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October 2004
STP5NK100Z - STF5NK100Z
STW5NK100Z
N-CHANNEL 1000V - 2.7
- 3.5A TO-220/TO-220FP/TO-247
Zener-Protected SuperMESHTMMOSFET
Table 1: General Features
s
TYPICAL R
DS
(on) = 2.7
s
EXTREMELY HIGH dv/dt CAPABILITY
s
IMPROVED ESD CAPABILITY
s
100% AVALANCHE RATED
s
GATE CHARGE MINIMIZED
s
VERY LOW INTRINSIC CAPACITANCES
s
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established
stripbased PowerMESHTM layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOS-
FETs including revolutionary MDmeshTM products.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
IDEAL FOR OFF-LINE POWER SUPPLIES
Table 2: Order Codes
Figure 1: Package
Figure 2: Internal Schematic Diagram
TYPE
V
DSS
R
DS(on)
I
D
Pw
STF5NK100Z
STP5NK100Z
STW5NK100Z
1000 V
1000 V
1000 V
< 3.7
< 3.7
< 3.7
3.5 A (*)
3.5 A
3.5 A
30 W
125 W
125 W
TO-220FP
1
2
3
TO-220
1
2
3
TO-247
SALES TYPE
MARKING
PACKAGE
PACKAGING
STF5NK100Z
F5NK100Z
TO-220FP
TUBE
STP5NK100Z
P5NK100Z
TO-220
TUBE
STW5NK100Z
W15NK100Z
TO-247
TUBE
Rev. 2
STP5NK100Z - STF5NK100Z - STW5NK100Z
2/12
Table 3: Absolute Maximum ratings
( ) Pulse width limited by safe operating area
(1) I
SD
3.5A, di/dt
200A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
Table 4: Thermal Data
Table 5: Avalanche Characteristics
Table 6: Gate-Source Zener Diode
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
STP5NK100Z
STW5NK100Z
STF5NK100Z
V
DS
Drain-source Voltage (V
GS
= 0)
1000
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
1000
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
3.5
3.5 (*)
A
I
D
Drain Current (continuous) at T
C
= 100C
2.2
2.2 (*)
A
I
DM
( )
Drain Current (pulsed)
14
14 (*)
A
P
TOT
Total Dissipation at T
C
= 25C
125
30
W
Derating Factor
1
0.24
W/C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5K
)
4000
V
dv/dt (1)
Peak Diode Recovery voltage slope
4.5
V/ns
V
ISO
Insulation Withstand Voltage (DC)
-
2500
V
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
-55 to 150
C
C
TO-220
TO-247
TO-220FP
Rthj-case
Thermal Resistance Junction-case Max
1
4.2
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
3.5
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
250
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
3/12
STP5NK100Z - STF5NK100Z - STW5NK100Z
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
Table 7: On /Off
Table 8: Dynamic
Table 9: Source Drain Diode
(1) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
(3) C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source Breakdown
Voltage
I
D
= 1 mA, V
GS
= 0
1000
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating,
T
C
= 125C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20 V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 100 A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 1.75 A
2.7
3.7
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V , I
D
= 1.75 A
4
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0
1154
106
21.3
pF
pF
pF
C
oss eq
(3)
.
Equivalent Output Capacitance V
GS
= 0 V, V
DS
= 0 to 800 V
46.8
pF
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time
Rise Time
Turn-off-Delay Time
Fall Time
V
DD
= 500 V, I
D
= 1.75 A,
R
G
= 4.7
,
V
GS
= 10 V
(see Figure 21)
22.5
7.7
51.5
19
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 800 V, I
D
= 3.5 A,
V
GS
= 10 V
(see Figure 24)
42
7.3
21.7
59
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
3.5
14
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 3.5 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 3.5 A, di/dt = 100 A/s
V
DD
= 35V
(see Figure 22)
605
3.09
10.5
ns
C
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 3.5 A, di/dt = 100 A/s
V
DD
= 35V, T
j
= 150C
(see Figure 22)
742
4.2
11.2
ns
C
A
STP5NK100Z - STF5NK100Z - STW5NK100Z
4/12
Figure 3: Safe Operating Area For TO-220
Figure 4: Safe Operating Area For TO-220FP
Figure 5: Safe Operating Area For TO-247
Figure 6: Thermal Impedance TO-220
Figure 7: Thermal Impedance For TO-220FP
Figure 8: Thermal Impedance For TO-247
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STP5NK100Z - STF5NK100Z - STW5NK100Z
Figure 9: Output Characteristics
Figure 10: Transconductance
Figure 11: Gate Charge vs Gate-source Voltage
Figure 12: Transfer Characteristics
Figure 13: Static Drain-Source On Resistance
Figure 14: Capacitance Variations
STP5NK100Z - STF5NK100Z - STW5NK100Z
6/12
Figure 15: Normalized Gate Threshold Voltage
vs Temperature
Figure 16: Source-Drain Forward Characteris-
tics
Figure 17: Maximum Avalanche Energy vs
Temperature
Figure 18: Normalized On Resistance vs Tem-
perature
Figure 19: Normalized BV
DSS
vs Temperature
7/12
STP5NK100Z - STF5NK100Z - STW5NK100Z
Figure 20: Unclamped Inductive Load Test Cir-
cuit
Figure 21: Switching Times Test Circuit For
Resistive Load
Figure 22: Test Circuit For Inductive Load
Switching and Diode Recovery Times
Figure 23: Unclamped Inductive Wafeform
Figure 24: Gate Charge Test Circuit
STP5NK100Z - STF5NK100Z - STW5NK100Z
8/12
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L20
16.40
0.645
L30
28.90
1.137
P
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
TO-220 MECHANICAL DATA
9/12
STP5NK100Z - STF5NK100Z - STW5NK100Z
L2
A
B
D
E
H
G
L6
F
L3
G1
1 2 3
F2
F1
L7
L4
L5
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.45
0.7
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
L3
28.6
30.6
1.126
1.204
L4
9.8
10.6
.0385
0.417
L5
2.9
3.6
0.114
0.141
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
3
3.2
0.118
0.126
TO-220FP MECHANICAL DATA
STP5NK100Z - STF5NK100Z - STW5NK100Z
10/12
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
b2
3.0
3.40
0.118
0.134
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
0.620
e
5.45
0.214
L
14.20
14.80
0.560
0.582
L1
3.70
4.30
0.14
0.17
L2
18.50
0.728
P
3.55
3.65
0.140
0.143
R
4.50
5.50
0.177
0.216
S
5.50
0.216
TO-247 MECHANICAL DATA
11/12
STP5NK100Z - STF5NK100Z - STW5NK100Z
Table 10: Revision History
Date
Revision
Description of Changes
27-Sep-2004
1
First release.
08-Oct-2004
2
Final datasheet
STP5NK100Z - STF5NK100Z - STW5NK100Z
12/12
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