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July 2002
STP5NK80Z - STP5NK80ZFP
N-CHANNEL 800V - 1.9
- 4.3A TO-220/TO-220FP
Zener-Protected SuperMESHTMPower MOSFET
s
TYPICAL R
DS
(on) = 1.9
s
EXTREMELY HIGH dv/dt CAPABILITY
s
100% AVALANCHE TESTED
s
GATE CHARGE MINIMIZED
s
VERY LOW INTRINSIC CAPACITANCES
s
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established strip-
based PowerMESHTM layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshTM products.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
s
LIGHTING
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
Pw
STP5NK80Z
STP5NK80ZFP
800 V
800 V
< 2.4
< 2.4
4.3 A
4.3 A
110 W
30 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STP5NK80Z
P5NK80Z
TO-220
TUBE
STP5NK80ZFP
P5NK80ZFP
TO-220FP
TUBE
TO-220
TO-220FP
1
2
3
INTERNAL SCHEMATIC DIAGRAM
STP5NK80Z - STP5NK80ZFP
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ABSOLUTE MAXIMUM RATINGS
(
l
) Pulse width limited by safe operating area
(1) I
SD
4.3A, di/dt
200A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
(#) When mounted on minimum Footprint
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
STP5NK80Z
STP5NK80ZFP
V
DS
Drain-source Voltage (V
GS
= 0)
800
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
800
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
4.3
4.3 (*)
A
I
D
Drain Current (continuous) at T
C
= 100C
2.7
2.7 (*)
A
I
DM
(
l
)
Drain Current (pulsed)
17.2
17.2 (*)
A
P
TOT
Total Dissipation at T
C
= 25C
110
30
W
Derating Factor
0.88
0.24
W/C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5K
)
3500
V
dv/dt (1)
Peak Diode Recovery voltage slope
4.5
V/ns
V
ISO
Insulation Withstand Voltage (DC)
-
2500
V
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
-55 to 150
C
C
TO-220
TO-220FP
Rthj-case
Thermal Resistance Junction-case Max
1.14
4.2
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
4.3
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
190
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
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STP5NK80Z - STP5NK80ZFP
ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
800
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 30V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 100A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 2.15 A
1.9
2.4
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V
,
I
D
= 2.15 A
4.25
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
910
98
20
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 400V
40
pF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 400 V, I
D
= 2 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
18
25
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 640V, I
D
= 4.3 A,
V
GS
= 10V
32.4
5
18.5
45.5
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
V
DD
= 400 V, I
D
= 2 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
45
30
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 640V, I
D
= 4.3 A,
R
G
= 4.7
,
V
GS
= 10V
(Inductive Load see, Figure 5)
22
10
32
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
4.3
17.2
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 4.3 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 4.3 A, di/dt = 100A/s
V
DD
= 40V, T
j
= 150C
(see test circuit, Figure 5)
500
3
12
ns
C
A
STP5NK80Z - STP5NK80ZFP
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Transfer Characteristics
Output Characteristics
Safe Operating Area For TO-220
Safe Operating Area For TO-220FP
Thermal Impedance For TO-220
Thermal Impedance For TO-220FP
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STP5NK80Z - STP5NK80ZFP
Gate Charge vs Gate-source Voltage
Normalized Gate Threshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Static Drain-source On Resistance
Capacitance Variations
Transconductance
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