1/13
March 2001
s
LOW R
DS(on)
: 1
TYP
s
OUTPUT SHORT-CIRCUIT PROTECTION
s
75mJ AVAILANCHE ENERGY
s
EIGHT 350mA DMOS OUTPUTS
s
50V SWITCHING CAPABILITY
s
FOUR DISTINCT FUNCTION MODES
s
LOW POWER CONSUMPTION
DESCRIPTION
This power logic 8-bit addressable latch controls
open-drain DMOS transistor outputs and is
designed for general-purpose storage
applications in digital systems. Specific uses
include working registers, serial-holding registers,
and decoders or demultiplexers. This is a
multifunctional device capable of operating as
eight addressable latches or an 8-line
demultiplexer with active-low DMOS outputs.
Each open-drain DMOS transistor features an
independent chopping current-limiting circuit to
prevent damage in the case of a short circuit.
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
and enumerated in the function table. In the
addressable-latch mode, data at the data-in (D)
terminal is written into the addressed latch. The
addressed DMOS-transistor output inverts the
data input with all unadressed DMOS-transistor
output remaining in their previuous state. In the
MOS-transistor outputs remain in their previous
states and are unaffected by the data or address
inputs. To eliminate the possibility of entering
erroneus data in the latch, enable G should be
held high (inactive) while the address lines are
changing. In the 8-line demoultiplexing mode, the
addressed output is inverted with respectto the D
input and all other output are high. In the clear
mode, all outputs are high and unaffected by the
address and data inputs.
Separate power ground (PGND) and logic ground
(LGND) terminals are providied to facilitate
maximum system flexibility. All PGND terminals
are interally connected, and each pGND terminal
must be externally connected to the power system
ground in order to minimize parasitic impedance.
A single-point connection between LGND and
PGND must be made externally in a manner that
reduces crosstalk between the logi and load
circuits.
The STPIC6A259 is offered in a termally
enhanced SO-24 package. The STPIC6A259 is
characterized for operation over the operating
case temperature range -40C to 125C.
ORDERING CODES
Type
Package
Comments
STPIC6A259M
SO-24 Batwing (Tube)
50parts per tube / 20tube per box
STPIC6A259MTR
SO-24 Batwing (Tape & Reel)
2500 parts per reel
STPIC6A259
POWER LOGIC 8-BIT ADDRESSABLE LATCH
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
SOP
PRELIMINARY DATA
STPIC6A259
2/13
LOGIC SYMBOL AND PIN CONFIGURATION
FUNCTIONAL TABLE
FUNCTIONAL TABLE
INPUT AND OUTPUT EQUIVALENT CIRCUITS
INPUTS
OUTPUT OF
ADDRESSED
DRAIN
EACH
OTHER
DRAIN
FUNCTION
CLR
G
D
H
L
H
L
Q
io
Addressable
Latch
H
L
L
H
Q
io
H
H
X
Q
io
Q
io
Memory
L
L
H
L
H
8-Line
Demultiplexer
L
L
L
H
H
L
H
X
H
H
Clear
SELECT INPUTS
DRAIN ADDRESSED
S2
S1
S0
L
L
L
0
L
L
H
1
L
H
L
2
L
H
H
3
H
L
L
4
H
L
H
5
H
H
L
6
H
H
H
7
STPIC6A259
3/13
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
THERMAL DATA
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Logic Supply Voltage (See Note 2)
7
V
V
I
Logic Input Voltage Range
-0.3 to 7
V
V
DS
Power DMOS Drain to Source Voltage (See Note 2)
50
V
I
DS
Continuous Source to Drain Diode Anode Current
1
A
I
DS
Pulsed Source to Drain Diode Anode Current (See Note 3)
2
A
I
D
Pulsed Drain Current, Each Output, All Output ON (T
C
=25C)
1.1
A
I
D
Continuous Current, Each Output, All Output ON (T
C
=25C)
350
mA
I
D
Peak Drain Current Single Output (T
C
=25C) (See Note 3)
1.1
A
E
AS
Single Pulse Avalanche Energy (See Note 6)
75
mJ
I
AS
Avalanche Current (See Note 4)
600
mA
P
d
Continuous total dissipation (T
C
25C)
1750
mW
P
d
Continuous total dissipation (T
C
= 125C)
350
mW
T
J
Operating Virtual Junction Temperature Range
-40 to +150
C
T
C
Operating Case Temperature Range
-40 to +125
C
T
stg
Storage Temperature Range
-65 to +150
C
T
L
Lead Temperature 1.6mm (1/16inch) from case for 10 seconds
260
C
Symbol
Parameter
Unit
R
thj-case
Thermal Resistance Junction-case
10
C/W
R
thj-amb
Thermal Resistance Junction-ambient
50
C/W
Symbol
Parameter
Min.
Max.
Unit
V
CC
Logic Supply Voltage
4.5
5.5
V
V
IH
High Level Input Voltage
0.85V
CC
V
CC
V
V
IL
Low Level Input Voltage
0
0.15V
CC
V
I
DP
Pulse Drain Output Current (T
C
=25C, V
CC
=5V) (see note 3, 5)
-1.8
0.6
A
t
su
Set-up Time, D High Before G
(see Figure 2)
10
ns
t
h
Hold Time, D High Before G
(see Figure 2)
5
ns
t
W
Pulse Duration (see Figure 2)
15
ns
T
C
Operating Case Temperature
-40
125
C
STPIC6A259
4/13
DC CHARACTERISTICS (V
CC
=5V, T
C
= 25C, unless otherwise specified.)
SWITCHING CHARACTERISTICS (V
CC
=5V, T
C
= 25C, unless otherwise specified.)
Note 1: All Voltage valuea are with respect to LGND and PGND
Note 2: Each power DMOS source is internally connected to GND
Note 3: Pulse duration
100ms
and duty cycle
2%
Note 4: Drain Supply Voltage = 15V, starting junction temperature (T
JS
) = 25C. L = 210
H and I
AS
= 600mA (See Fig. 6)
Note 5: Technique should limit T
J
- T
C
to 10C maximum
Note 6: These parameters are measured with voltage sensing contacts separate from the current-carrying contacts.
Note 7: Nominal Current is defined for a consistent comparison between devices from different sources. It is the current that produces a
voltage drop of 0.5V at T
C
= 85C.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSX
Drain-to-Source breakdown
Voltage
I
D
= 1mA
50
V
V
SD
Source-to-Drain Diode
Forward Voltage
I
F
= 350 mA (See Note 3)
0.8
1.1
V
I
IH
High Level Input Current
V
I
= V
CC
1
A
I
IL
Low Level Input Current
V
I
= 0
-1
A
I
CC
Logic Supply Current
I
O
= 0
0.5
5
mA
I
OK
Output Current at Which
Chopping Starts
T
C
= 25C
(See Note 3 and Figg.
3, 4)
0.6
0.8
1.1
A
I
(nom)
Nominal Current
V
DS(on)
= 0.5V
I
(nom)
= I
D
V
CC
= 5V
T
C
=85C
(See Note 5, 6, 7)
350
mA
I
D
Off-State Drain Current
V
DS
= 40V
T
C
=25C
0.1
1
A
V
DS
= 40V
T
C
=125C
0.2
5
A
R
DS(on)
Termination Resistance
(See Note 5, 6 and figg. 9,
10)
I
D
= 350mA
T
C
=25C
1
1.5
I
D
= 350mA
T
C
=125C
1.7
2.5
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
PHL
Propagation Dealy Time,
High to Low Level Output
from D
C
L
= 30pF
I
D
= 350mA
(See Figg. 1, 2, 11)
30
ns
t
PLH
Propagation Dealy Time,
Low to High Level Output
from D
125
ns
t
r
Rise Time, Drain Output
60
ns
t
f
Fall Time, Drain Output
30
ns
t
a
Reverse Recovery Current
Rise Time
I
F
= 350mA
di/dt = 20A/
s
(See Note 5, 6 and Fig. 5)
100
ns
t
rr
Reverse Recovery Time
300
ns
STPIC6A259
5/13
LOGIC DIAGRAM
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