1/8
March 2001
STW9NC70Z
N-CHANNEL 700V - 0.90
- 7.5A TO-247
Zener-Protected PowerMESHTMIII MOSFET
s
TYPICAL R
DS
(on) = 0.9
s
EXTREMELY HIGH dv/dt CAPABILITY GATE-
TO-SOURCE ZENER DIODES
s
100% AVALANCHE TESTED
s
VERY LOW INTRINSIC CAPACITANCES
s
GATE CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH OVERLAYTM Power
MOSFETs for very high voltage exhibits unsur-
passed on-resistance per unit area while integrating
back-to-back Zener diodes between gate and
source. Such arrangement gives extra ESD capabil-
ity with higher ruggedness performance as request-
ed by a large variety of single-switch applications.
APPLICATIONS
s
SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
s
WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
()Pulse width limited by safe operating area
(1)I
SD
7.5A, di/dt
100A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
TYPE
V
DSS
R
DS(on)
I
D
STW9NC70Z
700 V
< 1.2
7.5A
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
700
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
700
V
V
GS
Gate- source Voltage
25
V
I
D
Drain Current (continuos) at T
C
= 25C
7.5
A
I
D
Drain Current (continuos) at T
C
= 100C
4.7
A
I
DM
(
q
)
Drain Current (pulsed)
30
A
P
TOT
Total Dissipation at T
C
= 25C
160
W
Derating Factor
1.28
W/C
I
GS
Gate-source Current (DC)
50
mA
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=15K
)
3
KV
dv/dt (1)
Peak Diode Recovery voltage slope
3
V/ns
T
stg
Storage Temperature
65 to 150
C
T
j
Max. Operating Junction Temperature
150
C
TO-247
STW9NC70Z
2/8
THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED)
OFF
ON (1)
DYNAMIC
Rthj-case
Thermal Resistance Junction-case Max
0.78
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
30
C/W
Rthc-sink
Thermal Resistance Case-sink Typ
0.1
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
7.5
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
320
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 A, V
GS
= 0
700
V
BV
DSS
/
T
J
Breakdown Voltage Temp.
Coefficient
I
D
= 1 mA, V
GS
= 0
0.8
V/C
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
1
A
V
DS
= Max Rating, T
C
= 125 C
50
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
10
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
3
4
5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 3.75 A
0.9
1.2
I
D(on)
On State Drain Current
V
DS
> I
D(on)
x R
DS(on)max,
V
GS
= 10V
7.5
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
> I
D(on)
x R
DS(on)max,
I
D
=3.75A
6
S
C
iss
Input Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
2350
pF
C
oss
Output Capacitance
180
pF
C
rss
Reverse Transfer
Capacitance
22
pF
3/8
STW9NC70Z
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON (RESISTIVE LOAD)
SWITCHING OFF (INDUCTIVE LOAD)
SOURCE DRAIN DIODE
GATE-SOURCE ZENER DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3.
V
BV
=
T (25-T) BV
GSO
(25)
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the 25V Zener voltage is appropiate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
Turn-on Delay Time
V
DD
= 350V, I
D
= 3.75A
R
G
= 4.7
V
GS
= 10V
(see test circuit, Figure 3)
30
ns
t
r
Rise Time
10
ns
Q
g
Total Gate Charge
V
DD
= 560V, I
D
= 7.5 A,
V
GS
= 10V
55
77
nC
Q
gs
Gate-Source Charge
14
nC
Q
gd
Gate-Drain Charge
21
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
r(Voff)
Off-voltage Rise Time
V
DD
= 560V, I
D
= 7.5 A,
R
G
= 4.7
,
V
GS
= 10V
(see test circuit, Figure 5)
15
ns
t
f
Fall Time
12
ns
t
c
Cross-over Time
20
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
Source-drain Current
7.5
A
I
SDM
(2)
Source-drain Current (pulsed)
30
A
V
SD
(1)
Forward On Voltage
I
SD
= 7.5 A, V
GS
= 0
1.6
V
t
rr
Reverse Recovery Time
I
SD
= 7.5 A, di/dt = 100A/s,
V
DD
= 100V, T
j
= 150C
(see test circuit, Figure 5)
680
ns
Q
rr
Reverse Recovery Charge
7.1
C
I
RRM
Reverse Recovery Current
21
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
25
V
T
Voltage Thermal Coefficient
T=25C Note(3)
1.3
10
-4
/C
Rz
Dynamic Resistance
I
GS
= 50 mA
90
STW9NC70Z
4/8
Thermal Impedance
Transconductance
Static Drain-source On Resistance
Output Characteristics
Safe Operating Area
Transfer Characteristics
5/8
STW9NC70Z
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Normalized Gate Threshold Voltage vs Temp.
Capacitance Variations
Gate Charge vs Gate-source Voltage
STW9NC70Z
6/8
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
7/8
STW9NC70Z
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.7
5.3
0.185
0.209
D
2.2
2.6
0.087
0.102
E
0.4
0.8
0.016
0.031
F
1
1.4
0.039
0.055
F3
2
2.4
0.079
0.094
F4
3
3.4
0.118
0.134
G
10.9
0.429
H
15.3
15.9
0.602
0.626
L
19.7
20.3
0.776
0.779
L3
14.2
14.8
0.559
0.582
L4
34.6
1.362
L5
5.5
0.217
M
2
3
0.079
0.118
P025P
TO-247 MECHANICAL DATA
STW9NC70Z
8/8
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
2000 STMicroelectronics Printed in Italy All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
PDF 
ZIP