TDA7316
FOUR BANDS DIGITAL CONTROLLED GRAPHIC EQUALIZER
VOLUME CONTROL IN 0.375dB STEP
FOUR BANDS STEREO GRAPHIC EQUAL-
IZER
CENTER FREQUENCY, BANDWIDTH, MAX
BOOST/CUT DEFINED BY EXTERNAL COM-
PONENTS
14dB CUT/BOOST CONTROL IN 2dB/STEP
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIALBUS
VERY LOW DISTORTION
VERY LOW NOISE AND DC STEPPING BY
USE OF A MIXED BIPOLAR/CMOS TECH-
NOLOGY
DESCRIPTION
The TDA7316 is a monolithic, digitally controlled
graphic equalizer realized in BiCMOS mixed technol-
ogy. The stereo signal, before any filtering, can be at-
tenuated down to -17.625dB in 0.375dB step.
All the functions can be programmed via serial
bus making easy to build a
P controlled system.
Signal path is designed for very low noise and distor-
tion.
November 1999
SO28
ORDERING NUMBER: TDA7316
BLOCK DIAGRAM
1/10
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
S
Supply Voltage
10.2
V
T
op
Operating Temperature Range
-40 to +85
C
T
stg
Storage Temperature Range
-55 to +150
C
R
tjvins
Thermal Resistance Junction pins
max
85
C/W
PIN CONNECTION
ELECTRICAL CHARACTERISTICS (T
amb
= 25
C, V
S
= 9V, R
L
= 10K
, R
g
= 600
, f = 1KHz V
IN
=
1Vrms, all controls in flat position (AV = 0dB) unless otherwise specified).
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY
V
S
Supply Voltage
6
9
10
V
I
S
Supply Current
8
14
20
mA
SVR
Ripple Rejection
60
80
dB
TDA7316
2/10
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
INPUT
R
I
Input Resistance
20
30
40
K
V
IN max
Max Input Signal
THD = 0.3%
2.0
2.5
V
RMS
IN
S
Input Separation (1)
80
100
dB
VOLUME CONTROL
C
RANGE
Control Range
17.625
dB
A
VMIN
Min. Attenuation
-0.5
0
0.5
dB
A
VMAX
Max. Attenuation
16.7
17.625
18.6
dB
A
STEP
Step Resolution
0.175
0.375
0.575
dB
E
A
Attenuation Set Error
-1.0
1
dB
E
T
Tracking Error
0.5
dB
V
DC
DC Steps
adjacent attenuation steps
0
3.0
mV
GRAPHIC EQUALIZER
THD
Distortion
0.01
0.1
%
C
s
Channel Separation
80
100
dB
e
NO
Output Noise
BW = 20Hz to 20KHz
flat, AV = 0dB
8
20
V
A curve
6
V
BW = 20Hz to 20KHz AV = 0dB
All bands = max. boost
All bands = max. cut
24
6
V
V
S/N
Signal to Noise Ratio
A
V
= 0dB; V
ref
= 1V
RMS
100
dB
B
step
Step Resolution
1
2
3
dB
C
RANGE
Control Range
max boost/cut
12
14
16
dB
VDC
DC Steps
Adiacent Control Steps
0.5
3
mV
AUDIO OUTPUTS
V
O
Output Voltage
2
2.5
V
RMS
R
L
Output Load Resistance
2
K
C
L
Output Load Capacitance
10
nF
R
O
Output Resistance
5
10
20
V
OUT
DC Voltage Level
4.2
4.5
4.8
V
BUS INPUTS
V
IL
Input Low Voltage
1
V
V
IH
Input High Voltage
3
V
I
IN
Input Current
-5
+5
A
V
O
Output Voltage SDA
Acknowledge
I
O
= 1.6mA
0.4
V
ADDRESS PIN (Internal 50K
pull down resistor)
V
IL
Input Low Voltage
1
V
V
IH
Input High Voltage
V
CC
-1V
V
NOTE1: The selected input is grounded thre the 2.2
F capacitor
TDA7316
3/10
Fig. 1
x = band number
y = left or right
DEVICE DESCRIPTION
The TDA7316 is a four bands, digitally controlled
stereo Graphic Equalizer.
The device is intended for high quality audio ap-
plication in Hi-Fi, TV and car radio systems where
feature like low noise and THD are key factors. A
mixed Bipolar Cmos Technology allows:
Cmos analog switches for pop free commuta-
tions, high frequency op.amp. (GWB = 10MHz)
and high linearity polisilicon resistor for THD =
0.01 (at Vin = 1Vrms) and a S/N ratio of 102dB.
The internal Block Diagram is shown on page 1.
The first stage is a volume control. The control
range is 0 to -17.625dB with 0.375dBstep.
The very high resolution (0.375dB step) allows
the implementation of closed loop amplitude con-
trol system completely free from any acustical ef-
fect (stepping variation and pumping effect).
The volume control is followed by a serial four
bands equalizer. Each filtering cell is the biquad
cell shown in fig. 1
The internal resistor string is fixing the boost/cut
value while the buffer makes the Q (quality factor)
and central frequency, set by external compo-
nents, fully indipendent from the internal resistors.
Each filtering cell is realized using only 4 external
components (2 capacitors and 2 resistors) allow-
ing a flexible selection of centre frequency fo, Q
factor and gain. Here below the basic formulae
and the key features of each band pass filter are
reported:
f
o
= center frequency
Gv = gain/loss at the center frequency f
o
Gv = 20log(Av)
Q
=
f
o
f
2
-
f
1
where f
2
, f
1
= 3dB Bandwidth limits.
A
v
= (
R2
C2
) + (
R2
C1
)
+
(
R1
C1
)
(
R2
C1
) + (
R2
C2
)
Q
=
(
R1
C1
R2
C2
)
(
R2
C1
) + (
R2
C2
)
f
o
=
1
2
(
R1
R2
C1
C2
)
If C1 is fixed, then:
C2
=
Q
2
A
v
-
1
-
Q
2
C1
R2
=
1
2
C1
f
o
(
A
v
-
1
)
Q
(
A
v
-
1
-
Q
2
)
R1
= (
A
v
-
1
)
2
A
v
-
1
-
Q
2
R2
Likewise, the components values can be deter-
mined byfixing one of the other three parameters.
Referring to fig. 1 the suggested R2 value should
be higher than 2K
in order to have a good THD
(internal op. amp. current limit).
Viceversa the R1 value should be equal or lower
than 51K
in order to keep the "click"(DC step)
very low.
A typical application is shown by fig. 2
TDA7316
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Figure 2: Application Circuit
A five bands graphic equalizer is implemented us-
ing the 4 bands of the TDA7316 plus a fifth band
obtained from the bass control circuit of the
TDA7318 (or another audioprocessor of the SGS-
THOMSON 731X family). Applications requiring
higher number of external equalizer bands could
be
implemented by
cascading 2
or more
TDA7316 devices. In fact the dedicated ADDR
pin allows 2 addresses selection. Anyway, the ad-
dress of the graphic equalizer is different from the
audioprocessor one.
For example, 9 bands are implemented by using
of 2 TDA7316 plus an audioprocessor (TDA731X
family).
In case one filtering cell is not needed, a short cir-
cuit must be provided between the P1xy and
P2xy pins.
TDA7316
5/10
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