1/19
s
OPERATING FROM V
CC
= 2.2V to 5.5V
s
0.7W OUTPUT POWER @ Vcc=5V, THD=1%,
f=1kHz, with an 8
load
s
0.3W OUTPUT POWER @ Vcc=3.3V,
THD=1%, f=1kHz, with an 8
load
s
ULTRA LOW CONSUMPTION IN STANDBY
MODE (10nA)
s
77dB PSRR @ 217Hz from 5V to 2.2V
s
ULTRA LOW POP & CLICK
s
ULTRA LOW DISTORTION (0.1%)
s
UNITY GAIN STABLE
s
AVAILABLE IN MiniSO8 & SO8
DESCRIPTION
The TS4902 is an audio power amplifier designed
to provide the best price to power ratio while pre-
serving high audio quality.
Available in MiniSO8 & SO8 package, it is capable
of delivering up to 0.7W of continuous RMS ouput
power into an 8
load @ 5V.
TS4902 is also exhibiting an outstanding 0.1%
distortion level (THD) from a 5V supply for a Pout
of 200mW RMS.
An externally controlled standby mode reduces
the supply current to less than 10nA. It also in-
cludes an internal thermal shutdown protection.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
APPLICATIONS
s
Mobile Phones (Cellular / Cordless)
s
PDAs
s
Portable Audio Devices
ORDER CODE
S = MiniSO Package (MiniSO) is only available in Tape & Reel (ST)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
PIN CONNECTIONS (top view)
Part Number
Temperature
Range
Package
ST
D
TS4902IST
-40, +85C
TS4902ID
Standby
Bypass
V +
IN
V
IN-
V
2
OUT
GND
V
CC
V
OUT1
1
2
3
4
8
7
6
5
TYPICAL APPLICATION SCHEMATIC
TS4902IS-TS4902IST - MiniSO8
TS4902ID-TS4902IDT - SO8
Standby
Bypass
V +
IN
V
IN-
V
2
OUT
GND
V
CC
V
OUT1
1
2
3
4
8
7
6
5
Cb
Cin
Rin
Rfeed
Rstb
RL
8 Ohms
Cs
Input
Audio
Cfeed
VCC
VCC
Bias
AV = -1
Vin-
Vin+
Bypass
Standby
V
C
GND
Vout 1
Vout 2
+
-
+
-
4
2
6
5
7
1
3
8
TS4902
January 2002
TS4902
300mW at 3.3V SUPPLY AUDIO POWER AMPLIFIER
WITH STANDBY MODE ACTIVE LOW
TS4902
2/19
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply voltage
1)
6
V
V
i
Input Voltage
2)
G
ND
to V
CC
V
T
oper
Operating Free Air Temperature Range
-40 to + 85
C
T
stg
Storage Temperature
-65 to +150
C
T
j
Maximum Junction Temperature
150
C
R
thja
Thermal Resistance Junction to Ambient
3)
SO8
MiniSO8
175
215
C/W
Pd
Power Dissipation
4)
See the power derating
curves Fig 20.
ESD
Human Body Model
2
kV
ESD
Machine Model
200
V
Latch-up Latch-up Immunity
Class A
Lead Temperature (soldering, 10sec)
250
C
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed V
CC
+ 0.3V / G
ND
- 0.3V
3. Device is protected in case of over temperature by a thermal shutdown active @ 150C.
4. Exceeding the power derating curves during a long period, will cause abnormal operation.
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2.2 to 5.5
V
V
ICM
Common Mode Input Voltage Range
G
ND
to V
CC
- 1.5V
V
V
STB
Standby Voltage Input :
Device ON
Device OFF
1.5
V
STB
V
CC
GND
V
STB
0.5
V
R
L
Load Resistor
4 - 32
R
thja
Thermal Resistance Junction to Ambient
1)
SO8
MiniSO8
150
190
C/W
1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves)
TS4902
3/19
ELECTRICAL CHARACTERISTICS
V
CC
= +5V, GND = 0V, T
amb
= 25C (unless otherwise specified)
V
CC
= +3.3V, GND = 0V, T
amb
= 25C (unless otherwise specified)
3)
Symbol
Parameter
Min.
Typ.
Max.
Unit
I
CC
Supply Current
No input signal, no load
6
8
mA
I
STANDBY
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
1. Standby mode is actived when Vstdby is tied to GND
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8
0.7
W
THD + N
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
0.15
%
PSRR
Power Supply Rejection Ratio
2)
f = 217Hz, RL = 8
,
RFeed = 22K
,
Vripple = 200mV rms
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
77
dB
M
Phase Margin at Unity Gain
R
L
= 8
, C
L
= 500pF
70
Degrees
GM
Gain Margin
R
L
= 8
, C
L
= 500pF
20
dB
GBP
Gain Bandwidth Product
R
L
= 8
2
MHz
Symbol
Parameter
Min.
Typ.
Max.
Unit
I
CC
Supply Current
No input signal, no load
5.5
8
mA
I
STANDBY
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
1. Standby mode is actived when Vstdby is tied to GND
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8
300
mW
THD + N
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
0.15
%
PSRR
Power Supply Rejection Ratio
2)
f = 217Hz, RL = 8
,
RFeed = 22K
,
Vripple = 200mV rms
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
3. All electrical values are made by correlation between 2.6V and 5V measurements
77
dB
M
Phase Margin at Unity Gain
R
L
= 8
, C
L
= 500pF
70
Degrees
GM
Gain Margin
R
L
= 8
, C
L
= 500pF
20
dB
GBP
Gain Bandwidth Product
R
L
= 8
2
MHz
TS4902
4/19
ELECTRICAL CHARACTERISTICS
V
CC
= 2.6V, GND = 0V, T
amb
= 25C (unless otherwise specified)
REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100F.
2. The standby response time is about 1s.
Symbol
Parameter
Min.
Typ.
Max.
Unit
I
CC
Supply Current
No input signal, no load
5.5
8
mA
I
STANDBY
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
1. Standby mode is actived when Vstdby is tied to GND
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8
180
mW
THD + N
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
0.15
%
PSRR
Power Supply Rejection Ratio
2)
f = 217Hz, RL = 8
,
RFeed = 22K
,
Vripple = 200mV rms
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
77
dB
M
Phase Margin at Unity Gain
R
L
= 8
, C
L
= 500pF
70
Degrees
GM
Gain Margin
R
L
= 8
, C
L
= 500pF
20
dB
GBP
Gain Bandwidth Product
R
L
= 8
2
MHz
Components
Functional Description
Rin
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also
forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Cin
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
Rfeed
Feed back resistor which sets the closed loop gain in conjunction with Rin
Cs
Supply Bypass capacitor which provides power supply filtering
Cb
Bypass pin capacitor which provides half supply filtering
Cfeed
Low pass filter capacitor allowing to cut the high frequency
(low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
Rstb
Pull-up resistor which fixes the right supply level on the standby pin
Gv
Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)
TS4902
5/19
Fig. 1 : Open Loop Frequency Response
Fig. 3 : Open Loop Frequency Response
Fig. 5 : Open Loop Frequency Response
Fig. 2 : Open Loop Frequency Response
Fig. 4 : Open Loop Frequency Response
Fig. 6 : Open Loop Frequency Response
0.3
1
10
100
1000
10000
-40
-20
0
20
40
60
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
Vcc = 5V
RL = 8
Tamb = 25
C
G
a
in (dB
)
Frequency (kHz)
Gain
Phase
Phase (Deg)
0.3
1
10
100
1000
10000
-40
-20
0
20
40
60
80
-240
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
G
a
in (dB
)
Frequency (kHz)
Vcc = 33V
RL = 8
Tamb = 25
C
Gain
Phase
Phase (Deg)
0.3
1
10
100
1000
10000
-40
-20
0
20
40
60
80
-240
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
G
a
in (dB
)
Frequency (kHz)
Vcc = 2.6V
RL = 8
Tamb = 25
C
Gain
Phase
Phase (Deg)
0.3
1
10
100
1000
10000
-40
-20
0
20
40
60
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
G
a
in (dB
)
Frequency (kHz)
Vcc = 5V
ZL = 8
+ 560pF
Tamb = 25
C
Gain
Phase
Phase (Deg)
0.3
1
10
100
1000
10000
-40
-20
0
20
40
60
80
-240
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
G
a
in (dB
)
Frequency (kHz)
Vcc = 3.3V
ZL = 8
+ 560pF
Tamb = 25
C
Gain
Phase
Phase (Deg)
0.3
1
10
100
1000
10000
-40
-20
0
20
40
60
80
-240
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
G
a
in (dB
)
Frequency (kHz)
Vcc = 2.6V
ZL = 8
+ 560pF
Tamb = 25
C
Gain
Phase
Phase (Deg)
PDF 
ZIP