VND10N06/VND10N06-1
VNP10N06FI/K10N06FM
"OMNIFET":
FULLY AUTOPROTECTED POWER MOSFET
October 1997
BLOCK DIAGRAM (*)
TYPE
V
cl amp
R
DS(on )
I
lim
VND10N06
VND10N06-1
VNP10N06FI
VNK10N06FM
60 V
60 V
60 V
60 V
0. 3
0. 3
0. 3
0. 3
10 A
10 A
10 A
10 A
s
LINEAR CURRENT LIMITATION
s
THERMAL SHUT DOWN
s
SHORT CIRCUIT PROTECTION
s
INTEGRATED CLAMP
s
LOW CURRENT DRAWN FROM INPUT PIN
s
LOGIC LEVEL INPUT THRESHOLD
s
ESD PROTECTION
s
SCHMITT TRIGGER ON INPUT
s
HIGH NOISE IMMUNITY
DESCRIPTION
The VND10N06, VND10N06-1, VNP10N06FI and
VNK10N06FM are monolithic devices made
using SGS-THOMSON Vertical Intelligent Power
M0 Technology, intended for replacement of
standard power MOSFETS in DC to 50 KHz
applications. Built-in thermal shut-down, linear
current limitation and overvoltage clamp protect
the chip in harsh enviroments.
SOT82-FM
1
3
1
2
3
ISOWATT220
DPAK
TO-252
3
2
1
IPAK
TO-251
(
) SOT82-FM Pin Configuration: INPUT = 3; SOURCE = 1; DRAIN = 2.
1/14
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Val ue
Unit
DPAK
IPAK
ISOW ATT 220
SO T82-FM
V
DS
Drain-source Voltage (V
in
= 0)
I nternally Clamped
V
V
in
Input Voltage
I nternally Clamped
V
I
in
Input Current
20
mA
I
D
Drain Current
Internally Limited
A
I
R
Reverse DC O utput Current
-15
A
V
esd
Electrostatic Discharge (C= 100 pF ,
R=1.5 K
)
4000
V
P
to t
Total Dissipat ion at T
c
= 25
o
C
35
27
9
W
T
j
Operating Junction T emperature
Internally Limited
o
C
T
c
Case Operating T emperature
Internally Limited
o
C
T
st g
St orage Temperature
-55 to 150
o
C
THERMAL DATA
DPAK/ IPAK
I SOW AT T220
SO T82-FM
R
t hj-ca se
Thermal Resistance Junction-case
Max
3.5
4.5
14
o
C/W
R
t hj-a mb
Thermal Resistance Junction-ambient
Max
100
62.5
100
o
C/W
ELECTRICAL CHARACTERISTICS (T
case
= 25
o
C unless otherwise specified)
OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
CLAMP
Drain-source Clamp
Voltage
I
D
= 200 mA
V
in
= 0
50
60
70
V
V
I L
Input Low Level
Voltage
I
D
= 100
A
V
DS
= 16 V
1.5
V
V
I H
Input High Level
Voltage
R
L
= 27
V
DD
= 16 V
V
DS
= 0.5 V
3. 2
V
V
I NCL
Input-Source Reverse
Clamp Volt age
I
in
= -1 mA
I
in
= 1 mA
-1
8
-0.3
11
V
V
I
DSS
Zero Input Voltage
Drain Current (V
in
= 0)
V
DS
= 50 V
V
in
= V
IL
V
DS
< 35 V
V
in
= V
IL
250
100
A
A
I
I SS
Supply Current from
Input Pin
V
DS
= 0 V
V
in
= 5 V
150
300
A
ON (
)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
R
DS( on)
St atic Drain-source On
Resistance
V
i n
= 7 V
I
D
= 1 A
T
J
< 125
o
C
0. 15
0.3
VND10N06/VND10N06-1/VNP10N06FI/VNK10N06FM
2/14
ELECTRICAL CHARACTERISTICS (continued)
DYNAMIC
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
C
oss
Output Capacit ance
V
DS
= 13 V
f = 1 MHz
V
in
= 0
350
500
pF
SWITCHING (**)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
d(on)
t
r
t
d(of f)
t
f
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V
DD
= 16 V
I
d
= 1 A
V
gen
= 7 V
R
gen
= 10
(see f igure 3)
1100
550
200
100
1600
900
400
200
ns
ns
ns
ns
t
d(on)
t
r
t
d(of f)
t
f
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V
DD
= 16 V
I
d
= 1 A
V
gen
= 7 V
R
gen
= 1000
(see f igure 3)
1.2
1
1.6
1.2
1.8
1.5
2.3
1.8
s
s
s
s
(di/ dt)
on
Turn-on Current Slope
V
DD
= 16 V
I
D
= 1 A
V
i n
= 7 V
R
gen
= 10
1.5
A/
s
Q
i
Total Input Charge
V
DD
= 12 V
I
D
= 1 A
V
in
= 7 V
13
nC
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
SD
(
)
Forward O n Volt age
I
SD
= 1 A
V
in
= V
IL
0.8
1.6
V
t
r r
(
)
Q
r r
(
)
I
RRM
(
)
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 1 A
di/dt = 100 A/
s
V
DD
= 30 V
T
j
= 25
o
C
(see t est circuit, figure 5)
125
0. 22
3.5
ns
C
A
PROTECTION
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
I
lim
Drain Current Limit
V
i n
= 7 V
V
DS
= 13 V
6
10
15
A
t
dl im
(
)
St ep Response
Current Limit
V
i n
= 7 V
V
DS
step from 0 to 13 V
12
20
s
T
jsh
(
)
Overtemperature
Shutdown
150
o
C
T
j rs
(
)
Overtemperature Reset
135
o
C
E
as
(
)
Single Pulse
Avalanche Energy
st arting T
j
= 25
o
C
V
DD
= 24 V
V
i n
= 7 V
R
g en
= 1 K
L = 10 mH
250
mJ
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Parameters guaranteed by design/characterization
VND10N06/VND10N06-1/VNP10N06FI/VNK10N06FM
3/14
PROTECTION FEATURES
During Normal Operation, the INPUT pin is
electrically connected to the gate of the internal
power MOSFET through a low impedance path
as soon as V
IN
> V
IH
.
The device then behaves like a standard power
MOSFET and can be used as a switch from DC
to 50KHz. The only difference from the user's
standpoint is that a small DC current (typically
150
A) flows into the INPUT pin in order to
supply the internal circuitry.
During turn-off of an unclamped inductive load
the output voltage is clamped to a safe level by
an integrated Zener clamp between DRAIN pin
and the gate of the internal Power MOSFET.
In this condition, the Power MOSFET gate is set
to a voltage high enough to sustain the inductive
load current even if the INPUT pin is driven to 0V.
The device integrates an active current limiter
circuit which limits the drain current I
D
to I
lim
whatever the INPUT pin Voltage.
When the current limiter is active, the device
operates in the linear region, so power dissipation
may exceed the heatsinking capability. Both case
and junction temperatures increase, and if this
phase lasts long enough, junction temperature
may reach the overtemperature threshold T
jsh
.
If T
j
reaches T
jsh
, the device shuts down
whatever the INPUT pin voltage. The device will
restart automatically when T
j
has cooled down to
T
jrs
VND10N06/VND10N06-1/VNP10N06FI/VNK10N06FM
4/14
Thermal Impedance For DPAK / IPAK
Thermal Impedance For SOT82-FM
Output Characteristics
Thermal Impedance For ISOWATT220
Derating Curve
Static Drain-Source On Resistance vs Input
Voltage
VND10N06/VND10N06-1/VNP10N06FI/VNK10N06FM
5/14
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