VND7N04/VND7N04-1
VNP7N04FI/K7N04FM
"OMNIFET":
FULLY AUTOPROTECTED POWER MOSFET
February 2000
BLOCK DIAGRAM
T YPE
V
c lamp
R
DS(on)
I
l im
VND7N04
VND7N04-1
VNP7N04F I
VNK7N04F M
42 V
42 V
42 V
42 V
0.14
0.14
0.14
0.14
7 A
7 A
7 A
7 A
s
LINEAR CURRENT LIMITATION
s
THERMAL SHUT DOWN
s
SHORT CIRCUIT PROTECTION
s
INTEGRATED CLAMP
s
LOW CURRENT DRAWN FROM INPUT PIN
s
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
s
ESD PROTECTION
s
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
s
COMPATIBLE WITH STANDARD POWER
MOSFET
DESCRIPTION
The VND7N04, VND7N04-1, VNP7N04FI and
VNK7N04FM are monolithic devices made using
STMicroeletronics
VIPower
M0
Technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shut-down, linear current limitation and
overvoltage clamp protect the chip in harsh
enviroments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
SOT82-FM
1
3
1
2
3
ISOWATT220
DPAK
TO-252
3
2
1
IPAK
TO-251
1/14
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
DPAK
IP AK
ISOW AT T220
SOT -82FM
V
DS
Drain-source Volt age (V
in
= 0)
Internally Clamped
V
V
in
Input Voltage
18
V
I
D
Drain Current
Internally Limited
A
I
R
Reverse DC O utput Current
-7
A
V
esd
Electrostatic Discharge (C= 100 pF,
R=1.5 K
)
2000
V
P
tot
Tot al Dissipation at T
c
= 25
o
C
60
24
9
W
T
j
Operating Junct ion T emperature
Internally Limited
o
C
T
c
Case O perat ing T emperature
Internally Limited
o
C
T
stg
Storage Temperature
-55 t o 150
o
C
THERMAL DATA
DPAK/ IPAK
I SOW AT T220
SO T82-FM
R
t hj-ca se
Thermal Resistance Junction-case
Max
3. 75
5.2
14
o
C/W
R
t hj-a mb
Thermal Resistance Junction-ambient
Max
100
62.5
100
o
C/W
ELECTRICAL CHARACTERISTICS (-40 < T
j
< 125
o
C unless otherwise specified)
OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
CLAMP
Drain-source Clamp
Voltage
I
D
= 200 mA
V
in
= 0
32
42
52
V
V
CL TH
Drain-source Clamp
Threshold Voltage
I
D
= 2 mA
V
in
= 0
31
V
V
I NCL
Input-Source Reverse
Clamp Volt age
I
in
= -1 mA
-1.1
-0.25
V
I
DSS
Zero Input Voltage
Drain Current (V
in
= 0)
V
DS
= 13 V
V
in
= 0
V
DS
= 25 V
V
in
= 0
75
200
A
A
I
I SS
Supply Current from
Input Pin
V
DS
= 0 V
V
in
= 10 V
250
550
A
ON (
)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
IN(th)
Input Threshold
Voltage
V
DS
= V
in
I
D
+ Ii
n
= 1 mA
0. 8
3
V
R
DS( on)
St atic Drain-source On
Resistance
V
i n
= 10 V
I
D
= 3.5 A
V
i n
= 5 V
I
D
= 3.5 A
-40 < T
j
< 25
o
C
V
i n
= 10 V
I
D
= 3.5 A
V
i n
= 5 V
I
D
= 3.5 A
T
j
= 125
o
C
0.14
0.28
0.28
0.56
VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM
2/14
ELECTRICAL CHARACTERISTICS (continued)
DYNAMIC
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
g
fs
(
)
Forward
Transconductance
V
DS
= 13 V
I
D
= 3. 5 A
2
5
S
C
oss
Output Capacit ance
V
DS
= 13 V
f = 1 MHz
V
in
= 0
250
500
pF
SWITCHING (**)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
d(on)
t
r
t
d(of f)
t
f
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V
DD
= 15 V
I
d
= 3. 5 A
V
gen
= 10 V
R
gen
= 10
(see f igure 3)
50
60
130
50
150
180
300
200
ns
ns
ns
ns
t
d(on)
t
r
t
d(of f)
t
f
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V
DD
= 15 V
I
d
= 3. 5 A
V
gen
= 10 V
R
gen
= 1000
(see f igure 3)
140
0.4
2.5
1
500
1.1
7
4
ns
s
s
s
(di/ dt)
on
Turn-on Current Slope
V
DD
= 15 V
I
D
= 3.5 A
V
i n
= 10 V
R
gen
= 10
50
A/
s
Q
i
Total Input Charge
V
DD
= 12 V
I
D
= 3.5 A
V
i n
= 10 V
18
nC
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
SD
(
)
Forward O n Volt age
I
SD
= 3. 5 A
V
in
= 0
1.7
V
t
r r
(
)
Q
r r
(
)
I
RRM
(
)
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 3.5 A
di/dt = 100 A/
s
V
DD
= 30 V
T
j
= 25
o
C
(see t est circuit, figure 5)
40
0.2
3.6
ns
C
A
PROTECTION
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
I
lim
Drain Current Limit
V
i n
= 10 V
V
DS
= 13 V
V
i n
= 5 V
V
DS
= 13 V
4
4
7
7
11
11
A
A
t
dl im
(
)
St ep Response
Current Limit
V
i n
= 10 V
V
i n
= 5 V
13
15
20
25
s
s
T
jsh
(
)
Overtemperature
Shutdown
150
o
C
T
j rs
(
)
Overtemperature Reset
135
o
C
I
gf
(
)
Fault Sink Current
V
i n
= 10 V
V
DS
= 13 V
V
i n
= 5 V
V
DS
= 13 V
50
20
mA
mA
E
as
(
)
Single Pulse
Avalanche Energy
st arting T
j
= 25
o
C
V
DD
= 20 V
V
i n
= 10 V
R
gen
= 1 K
L = 30 mH
0. 4
J
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Parameters guaranteed by design/characterization
VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM
3/14
During
normal
operation, the
Input
pin
is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC to 50 KHz. The only difference
from the user's standpoint is that a small DC
current (I
iss
) flows into the Input pin in order to
supply the internal circuitry.
The device integrates:
-
OVERVOLTAGE
CLAMP
PROTECTION:
internally set at 42V, along with the rugged
avalanche
characteristics
of
the
Power
MOSFET stage give this device unrivalled
ruggedness and energy handling capability.
This feature is mainly important when driving
inductive loads.
-
LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input
pin voltage. When the current limiter is active,
the device operates in the linear region, so
power dissipation may exceed the capability of
the
heatsink.
Both
case
and
junction
temperatures increase, and if this phase lasts
long enough, junction temperature may reach
the overtemperature threshold T
jsh
.
-
OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing
the chip temperature and are not dependent on
the input voltage. The location of the sensing
element on the chip in the power stage area
ensures fast, accurate detection of the junction
temperature. Overtemperature cutout occurs at
minimum 150
o
C. The device is automatically
restarted when the chip temperature falls
below 135
o
C.
-
STATUS FEEDBACK: In the case of an
overtemperature fault
condition,
a
Status
Feedback is provided through the Input pin.
The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100
.
The failure can be detected by monitoring the
voltage at the Input pin, which will be close to
ground potential.
Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit (with a small increase in R
DS(on)
).
PROTECTION FEATURES
VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM
4/14
Thermal Impedance For DPAK / IPAK
Derating Curve
Transconductance
Thermal Impedance For ISOWATT220
Output Characteristics
Static Drain-Source On Resistance vs Input
Voltage
VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM
5/14
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