July 2003
1/29
VNB14NV04
/
VND14NV04
/
VND14NV04-1
/
VNP14NV04
/
VNS14NV04
"OMNIFET II":
FULLY AUTOPROTECTED POWER MOSFET
1
s
LINEAR CURRENT LIMITATION
s
THERMAL SHUT DOWN
s
SHORT CIRCUIT PROTECTION
s
INTEGRATED CLAMP
s
LOW CURRENT DRAWN FROM INPUT PIN
s
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
s
ESD PROTECTION
s
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
s
COMPATIBLE WITH STANDARD POWER
MOSFET
DESCRIPTION
The VNB14NV04, VND14NV04, VND14NV04-1,
VNP14NV04, VNS14NV04, are monolithic
devices designed in STMicroelectronics VIPower
M0-3 Technology, intended for replacement of
standard Power MOSFETS from DC up to 50KHz
applications. Built in thermal shutdown, linear
current limitation
|
and overvoltage clamp protect
the chip in harsh environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
TYPE
R
DS(on)
I
lim
V
clamp
VNB14NV04
VND14NV04
VND14NV04-1
VNP14NV04
VNS14NV04
35 m
12 A
40 V
Overvoltage
Gate
Linear
DRAIN
SOURCE
Clamp
1
2
3
Current
Limiter
Control
Over
Temperature
INPUT
BLOCK DIAGRAM
SO-8
TO-252 (DPAK)
TO-220 TO-251
(IPAK)
1
3
1
2
3
3
2
1
1
3
D
2
PAK
ORDER CODES
PACKAGE
TUBE
T&R
D
2
PAK
VNB14NV04
VNB14NV0413TR
TO-252 (DPAK) VND14NV04
VND14NV0413TR
TO-251 (IPAK)
VND14NV04-1
-
TO-220
VNP14NV04
-
SO-8
VNS14NV04
-
2/29
VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04
ABSOLUTE MAXIMUM RATING
CONNECTION DIAGRAM (TOP VIEW)
Symbol
Parameter
Value
Unit
SO-8
DPAK
TO-220
IPAK
D
2
PAK
V
DS
Drain-source Voltage (V
IN
=0V)
Internally Clamped
V
V
IN
Input Voltage
Internally Clamped
V
I
IN
Input Current
+/-20
mA
R
IN MIN
Minimum Input Series Impedance
10
I
D
Drain Current
Internally Limited
A
I
R
Reverse DC Output Current
-15
A
V
ESD1
Electrostatic Discharge (R=1.5K
, C=100pF)
4000
V
V
ESD2
Electrostatic Discharge on output pin only
(R=330
, C=150pF)
16500
V
P
tot
Total Dissipation at T
c
=25C
4.6
74
74
74
74
W
E
MAX
Maximum Switching Energy (L=0.4mH;
R
L
=0
; V
bat
=13.5V; T
jstart
=150C; I
L
=18A)
93
93
mJ
T
j
Operating Junction Temperature
Internally limited
C
T
c
Case Operating Temperature
Internally limited
C
T
stg
Storage Temperature
-55 to 150
C
SOURCE
DRAIN
INPUT
1
(*) For the pins configuration related to DPAK, D
2
PAK, IPAK, TO-220 see outlines at page 1.
CURRENT AND VOLTAGE CONVENTIONS
I
D
I
IN
V
IN
V
DS
R
IN
DRAIN
DRAIN
DRAIN
DRAIN
INPUT
SOURCE
SOURCE
SOURCE
1
4
5
8
SO-8 Package (*)
3/29
VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04
THERMAL DATA
(*)
When mounted on a standard single-sided FR4 board with 0.5cm
2
of Cu (at least 35
m thick) connected to all DRAIN pins.
Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (-40C < T
j
< 150C, unless otherwise specified)
OFF
ON
Symbol
Parameter
Value
Unit
SO-8
DPAK
TO-220
IPAK
D
2
PAK
R
thj-case
Thermal Resistance Junction-case
MAX
1.7
1.7
1.7
1.7
C/W
R
thj-lead
Thermal Resistance Junction-lead
MAX
27
C/W
R
thj-amb
Thermal Resistance Junction-ambient MAX
90 (*)
65 (*)
62
102
52 (*)
C/W
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
V
CLAMP
Drain-source Clamp
Voltage
V
IN
=0V; I
D
=7A 40
45
55
V
V
CLTH
Drain-source Clamp
Threshold Voltage
V
IN
=0V; I
D
=2mA 36
V
V
INTH
Input Threshold Voltage
V
DS
=V
IN
; I
D
=1mA
0.5
2.5
V
I
ISS
Supply Current from Input
Pin
V
DS
=0V; V
IN
=5V 100
150
A
V
INCL
Input-Source Clamp
Voltage
I
IN
=1mA
I
IN
=-1mA
6
-1.0
6.8
8
-0.3
V
I
DSS
Zero Input Voltage Drain
Current (V
IN
=0V)
V
DS
=13V; V
IN
=0V; T
j
=25C
V
DS
=25V; V
IN
=0V
30
75
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
R
DS(on)
Static Drain-source On
Resistance
V
IN
=5V; I
D
=7A; T
j
=25C
V
IN
=5V; I
D
=7A
35
70
m
1
4/29
VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04
ELECTRICAL CHARACTERISTICS (continued) (T
j
=25C, unless otherwise specified)
DYNAMIC
SWITCHING
SOURCE DRAIN DIODE
PROTECTIONS (-40C < T
j
< 150C, unless otherwise specified)
(*) Pulsed: Pulse duration = 300
s, duty cycle 1.5%
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
g
fs
(*)
Forward
Transconductance
V
DD
=13V; I
D
=7A
18
S
C
OSS
Output Capacitance
V
DS
=13V; f=1MHz; V
IN
=0V
400
pF
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
t
d(on)
Turn-on Delay Time
V
DD
=15V; I
D
=7A
V
gen
=5V; R
gen
=R
IN MIN
=10
(see figure 1)
80
250
ns
t
r
Rise Time
350
1000
ns
t
d(off)
Turn-off Delay Time
450
1350
ns
t
f
Fall Time
150
500
ns
t
d(on)
Turn-on Delay Time
V
DD
=15V; I
D
=7A
V
gen
=5V; R
gen
=2.2K
(see figure 1)
1.5
4.5
s
t
r
Rise Time
9.7
30.0
s
t
d(off)
Turn-off Delay Time
9
25.0
s
t
f
Fall Time
10.2
30.0
s
(di/dt)
on
Turn-on Current Slope
V
DD
=15V; I
D
=7A
V
gen
=5V; R
gen
=R
IN MIN
=10
16
A/
s
Q
i
Total Input Charge
V
DD
=12V; I
D
=7A; V
IN
=5V; I
gen
=2.13mA
(see figure 5)
36.8
nC
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
V
SD
(*)
Forward On Voltage
I
SD
=7A; V
IN
=0V
0.8
V
t
rr
Reverse Recovery Time
I
SD
=7A; di/dt=40A/
s
V
DD
=30V; L=200
H
(see test circuit, figure 2)
300
ns
Q
rr
Reverse
Recovery
Charge
0.8
C
I
RRM
Reverse
Recovery
Current
5
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
I
lim
Drain Current Limit
V
IN
=5V; V
DS
=13V 12
18
24
A
t
dlim
Step Response Current
Limit
V
IN
=5V; V
DS
=13V
45
s
T
jsh
Overtemperature
Shutdown
150
175
200
C
T
jrs
Overtemperature
Reset
135
C
I
gf
Fault Sink Current
V
IN
=5V; V
DS
=13V; T
j
=T
jsh
10
15
20
mA
E
as
Single Pulse
Avalanche Energy
starting T
j
=25C; V
DD
=24V
V
IN
= 5V; R
gen
=R
IN MIN
=10
; L=24mH
(see figures 3 & 4)
400
mJ
2
5/29
VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04
PROTECTION FEATURES
During normal operation, the INPUT pin is
electrically connected to the gate of the internal
power MOSFET through a low impedance path.
The device then behaves like a standard power
MOSFET and can be used as a switch from DC up
to 50KHz. The only difference from the user's
standpoint is that a small DC current I
ISS
(typ.
100
A) flows into the INPUT pin in order to supply
the internal circuitry.
The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 45V, along with the rugged
avalanche characteristics of the Power MOSFET
stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly
important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT:
limits the drain current I
D
to I
lim
whatever the
INPUT pin voltages. When the current limiter is
active, the device operates in the linear region, so
power dissipation may exceed the capability of the
heatsink. Both case and junction temperatures
increase, and if this phase lasts long enough,
junction temperature may reach the
overtemperature threshold T
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION:
these are based on sensing the chip temperature
and are not dependent on the input voltage. The
location of the sensing element on the chip in the
power stage area ensures fast, accurate detection
of the junction temperature. Overtemperature
cutout occurs in the range 150 to 190 C, a typical
value being 170 C. The device is automatically
restarted when the chip temperature falls of about
15C below shut-down temperature.
- STATUS FEEDBACK:
in the case of an overtemperature fault condition
(T
j
> T
jsh
), the device tries to sink a diagnostic
current I
gf
through the INPUT pin in order to
indicate fault condition. If driven from a low
impedance source, this current may be used in
order to warn the control circuit of a device
shutdown. If the drive impedance is high enough
so that the INPUT pin driver is not able to supply
the current I
gf
, the INPUT pin will fall to 0V. This
will not however affect the device operation:
no requirement is put on the current capability
of the INPUT pin driver except to be able to
supply the normal operation drive current I
ISS
.
Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit.
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