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Электронный компонент: 2N7007

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7-13
2N7007
Ordering Information
BV
DSS
/
R
DS(ON)
I
D(ON)
BV
DGS
(max)
(min)
TO-92
240V
45
150mA
2N7007
Order Number / Package
N-Channel Enhancement-Mode
Vertical DMOS FET
Package Options
Note 1: See Package Outline section for dimensions.
Features
s
s
Free from secondary breakdown
s
s
Low power drive requirement
s
s
Ease of paralleling
s
s
Low C
ISS
and fast switching speeds
s
s
Excellent thermal stability
s
s
Integral Source-Drain diode
s
s
High input impedance and high gain
s
s
Complementary N- and P-channel devices
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex's well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex's vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Applications
s
s
Motor controls
s
s
Converters
s
s
Amplifiers
s
s
Switches
s
s
Power supply circuits
s
s
Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Absolute Maximum Ratings
Drain-to-Source Voltage
BV
DSS
Drain-to-Gate Voltage
BV
DGS
Gate-to-Source Voltage
30V
Operating and Storage Temperature
-55
C to +150
C
Soldering Temperature*
300
C
*
Distance of 1.6 mm from case for 10 seconds.
TO-92
S G D
7-14
2N7007
Thermal Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
BV
DSS
Drain-to-Source Breakdown Voltage
240
V
I
D
= 100
A, V
GS
= 0V
V
GS(th)
Gate Threshold Voltage
1
2.5
V
V
GS
= V
DS
, I
D
= 250
A
I
GSS
Gate Body Leakage
10
nA
V
GS
=
20V, V
DS
= 0V
I
DSS
Zero Gate Voltage Drain Current
100
nA
V
GS
= 0V, V
DS
= 120V
1
A
V
GS
= 0V, V
DS
= 120V
T
A
= 125
C
I
D(ON)
ON-State Drain Current
50
V
GS
= 4.5V, V
DS
= 20V
150
V
GS
= 10V, V
DS
= 20V
R
DS(ON)
Static Drain-to-Source ON-State Resistance
45
V
GS
= 4.5V, I
D
= 20mA
45
V
GS
= 10V, I
D
= 50mA
G
FS
Forward Transconductance
30
m
V
DS
= 10V, I
D
= 50mA
C
ISS
Input Capacitance
30
C
OSS
Common Source Output Capacitance
15
pF
C
RSS
Reverse Transfer Capacitance
10
t
(ON)
Turn-ON Time
30
t
(OFF)
Turn-OFF Time
20
V
SD
Diode Forward Voltage Drop
1.2
V
I
SD
= 65mA, V
GS
= 0V
Notes:
1. All D.C. parameters 100% tested at 25
C unless otherwise stated. (Pulse test: 300
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
mA
ns
V
GS
= 0V, V
DS
= 25V
f = 1 MHz
V
DD
= 60V, I
D
= 50 mA,
R
GEN
= 25
Switching Waveforms and Test Circuit
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Electrical Characteristics
(@ 25
C unless otherwise specified)
Package
I
D
(continuous)*
I
D
(pulsed)
Power Dissipation
jc
ja
I
DR
*
I
DRM
@ T
C
= 25
C
C/W
C/W
TO-92
65mA
260mA
1W
125
170
65mA
260mA
*
I
D
(continuous) is limited by max rated T
j
.