HV312DB1
Hotswap Controller
rev 2 12SEP02
1
Introduction
The Supertex HV312DB1 demo board contains all circuitry
necessary to demonstrate the features of the HV312
hotswap controller. Intended primarily as a negative
hotswap controller, the HV312 controls the negative supply
path. Four sequenced power-good signals are provided,
with timing controlled via 3 resistors.
Included on board is a 100*F capacitor to provide a
capacitive load for testing. Additional capacitance may be
connected to the V
OUT
terminals. Or the 100*F may be
removed altogether
The board may be modified to meet custom requirements.
Instructions are provided on the next page for modifications.
Specifications
Input Voltage
10V to 90V
Inrush Limit
1A 20%
Circuit Breaker Trip
6.7A 20%
Retry Interval
16sec typ
On Resistance
40m 8 max
Undervoltage Trip
38.0V on, 32.2V off
Overvoltage Trip
64.5V on, 70.0V off
Power Good Signals
PWRGD
A
PWRGD
B
PWRGD
C
PWRGD
D
Active Low
~5ms after C
LOAD
charged
~200ms after `A'
~100ms after `B'
~5ms after `C'
Board Layout and Connections
V
IN
Connect the supply voltage to these terminals. Supply
voltage may range from 10 volts to 90 volts.
A high source impedance may cause oscillations when the
input voltage is near the undervoltage trip point. A high
source impedance results in a large voltage drop when
loaded, causing undervoltage lockout to kick in,
disconnecting the load. With the load removed, input voltage
rises, causing undervoltage to release and reconnecting the
load. The cycle repeats, resulting in oscillations. Source
impedance must be less than the following to avoid
oscillations:
LOAD
SOURCE
I
R
V
3
<
V
OUT
Connect the power supply or other load to these terminals.
V
OUT+
is connected to V
IN+
, it is V
OUT
that is switched.
Application of a DC load during start-up extends the time
inrush limiting is active. If this time exceeds 100ms, the
HV312 shuts off, retrying as quickly as 12s later. For this
reason, DC load at start-up should be less than 900mA.
Note that DC start-up load limitation decreases with added
load capacitance.
Connecting additional load capacitance alters the inrush
current limit. See the HV302/312 data sheet for details.
PWRGD
Connect to the power supply's ENABLE inputs. Depending
on the power supply, it may be necessary to level-translate
this signal via opto-isolator or discrete circuit. Refer to the
HV302/312 data sheet for a description of PWRGD and
related application circuits.
PWRGD is an open-drain output. During start-up and
whenever V
IN
is lower than the undervoltage trip point or
greater than the overvoltage trip point, PWRGD assumes a
high impedance state. Once V
IN
is within the proper range
and the load capacitance has fully charged, PWRGD is
pulled down to V
IN-
.
HV312
R10
R9
R8
R4
C3
R7
C4
R6
C2
C1
R5
Q1
C6
DC/DC
Converter
DC/DC
Converter
DC/DC
Converter
DC/DC
Converter
+
+
+
+
enable
enable
enable
enable
V
IN
first enabled
last enabled
HV312DB1
Hotswap
Controller
rev 2 12SEP02
2
Schematic
Inrush Limit
As supplied, the inrush current limit is set at 1 amp. To set
inrush limit to another value, please refer to the HV302/312
data sheet.
The circuit breaker trip point is set at 6.7 Amps. To set at a
different level, change R
5
according to the following
equation:
5
mV
100
R
I
CB
=
The power rating of R
5
should be selected based on
maximum current during normal operation, which could be
just under the circuit breaker trip point.
CB
I
P
=
mV
100
5
Timing
Timing capacitor C
1
determines start-up delay, rise time, and
circuit breaker retry interval,. Changing C
1
will alter these
timings. Refer to the HV302/312 datasheet for the equations
that relate these timings to the value of C
1
. For use in the
equations, the nominal gate threshold voltage (V
GS
) of the
supplied IRFR3710 is 3V and transconductance is about 10
siemens.
Resistors R
8
, R
9
, and R
10
set the delays for PWRGDs B, C,
and D according to the following equation:
Circuit Breaker Transient Immunity
The HV312 has built-in transient immunity of 25*s. To
increase transient immunity, an RC low-pass filter (R
6
C
2
)
may be placed on the SENSE input. (The demo board is
supplied with no filtering.)
Be aware that filtering the sense input will cause the inrush
current limit to overshoot at turn-on the greater the filtering,
the greater the overshoot.
Undervoltage/Overvoltage Lockout
Resistors R
1
, R
2
, and R
3
set the undervoltage and
overvoltage trip points. New trip points may be programmed
by changing the values of these resistors. Refer to the
HV302/312 data sheet for more information.
Additional Components
The RC network (R
7
C
4
) across the gate-source of the
external FET provides control loop compensation which
prevents inrush current peaking.
If the PWRGD A signal is used and experiences large
voltage swings, a 10nF capacitor should be installed at C
5
.
This limits dV/dt which may otherwise cause undesirable
coupling to internal circuits.
To defeat the circuit breaker auto-retry, install a 2.4M
resistor at location R
4
.
For servo-mode inrush control, remove C
3
. Inrush limit will
then be 3.3 Amps. See the HV302/312 data sheet for
details.
X
D
R
t
=
F
67
.
1
R
1
487k
R
2
9.09k
R
3
9.09k
R
4
not used
R
7
not used
R
5
15m
R
8
121k
Q
1
IRF3710S
C
5
not used
C
4
not used
C
1
10nF
R
9
60.4k
R
10
3.01k
C
6
100*F
V
OUT+
V
OUT-
V
IN+
V
IN-
HV312
V
DD
UV
OV
RAMP
SENSE
GATE
T
D
T
C
T
B
PWRGD
A
PWRGD
B
PWRGD
C
PWRGD
D
14
4
3
2
1
11
12
13
9
8
10
5
6
R
6
0
C
2
not used
C
3
680pF
V
EE
7
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