1
HV39
220V
Push-Pull
Output
*VN2222NC
(1 of 4
FETs)
V
LL
V
LL
GND
V
HIGH
V
CC
CS
ENA
OE
D0 D3
FAULT
PD0
PD3
5V
Digital
Control
DRV0
DRV3
4
HV3922
Package
Device
20 Pin Ceramic DIP
28 Pin Ceramic J-Lead
HV3922
HV3922C
HV3922DJ
High Voltage PIN Diode Driver
Ordering Information
General Description
The HV3922 is a monolithic high-voltage quad-output driver that
is designed to be used in conjunction with the Supertex
VN2222NC*, a separate N-channel DMOS FET quad array,
whose device characterics are briefly described below. Together,
these devices per-form a 220V push-pull function that is espe-
cially suited for driving PIN diodes in applications such as fre-
quency-hopping radios, microwave communication systems and
phased array radar.
Used as a microwave or RF switch, the HV3922 has 4 high-
voltage P-channel outputs: PD
0
, PD
1
, PD
2
and PD
3
. Additional
controls are Chip Select (CS) and Output Enable (OE) functions.
The HV3922 also has an output fault detection function that
protects the outputs from damage by putting them into a high
impedance state when a short is detected. The HV3922 provides
4 low-voltage outputs--DRV
0
, DRV
1
, DRV
2
and DRV
3
--that drive
the gates of the 4 N-channel FETs in the VN2222NC device. See
the diagram below for an example of the push-pull output struc-
ture that these two devices provide.
For detailed electrical characteristics of the VN2222NC, please
see the data sheet in Chapter 8. Currently, the HV3922 is
available in through-hole and surface-mount ceramic packages
that are suitable for military applications, while the VN2222NC is
offered in ceramic quad and discrete packages (VN2224N2 and
VN2224N3). For commercial product availability, please consult
the factory.
Features
Processed with HVCMOS
technology
5V CMOS logic low power dissipation
DMOS output voltage up to 220V
Low power level shifting 5V to 220V
Source current 1.7mA
Output fault detection
Latched data output
Push-Pull Configuration
Absolute Maximum Ratings
Supply Voltage, V
CC
-0.5V to +7.0V
Logic Input Voltage
-0.3V to VCC + 0.3V
Supply Voltage V
LL
-5.0V
Supply Voltage V
PP
+230V
Max Power Dissipation
0.8W
Junction Temperature
+150 C
Storage Temperature Range
-65 C to +150 C
Operating Temperature Range
-55 C to +125 C
Lead Soldering Temperature for 10 Seconds
+300 C
* VN2222NC is an N-channel DMOS FET quad array recommended for use in
conjunction with HV39 outputs to form four 220V push-pull outputs. Each of the
four devices has a max R
DS(ON)
of 1.25, min I
D(ON)
of 5.0 amps, and BV
DSS
of 220V.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
2
Symbol
Parameter
Min
Max
Units
Conditions
I
CCQ
Maximum Quiescent V
CC
Supply Current
1.0
mA
V
CC
= 5.5V All ouputs open
I
LLQ
Maximum Quiescent V
LL
Supply Current
4.0
mA
V
LL
= -3.5V D
RV(N)
high or low
I
PPQ
Maximum Quiescent V
PP
Supply Current
100
A
V
PP
= 220V P
D(N)
high or low
I
IH
High-level logic current
10
A
H
= V
CC
I
IL
Low-level logic current
10
A
L
= 0V
V
FH
Minimum high-level logic output voltage
4.4
V
V
CC
= 4.5V, I
OH
= 20A
(fault detect)
V
FL
Maximum low-level logic output voltage
0.1
V
V
CC
= 5.5V, I
OL
=-20A
(fault detect)
V
DH
Minimum P
D(N)
high-level output voltage
198
V
V
PP
= 203V, I
OH
=1.7mA
V
DH
Minimum D
RV(N)
high-level output voltage
4
V
V
CC
= 4.5V, I
OH
=100A
V
DL
Maximum D
RV(N)
low-output voltage
-2.3
V
V
LL
= -2.5V, I
DL
= -500A
V
TH(min)
Minimum fault threshold for P
D(N)
output high
0.5 x V
PP
V
P
D(N)
= HIGH, OE = V
CC
fault
V
TH(max)
Maximum fault threshold for P
D(N)
output high
0.85 x V
PP
V
P
D(N)
= HIGH, OE = V
CC
fault
V
TL(min)
Minimum fault threshold for P
D(N)
output Hi-Z
V
(PDN)
= 0V
V
P
D(N)
= Hi-Z, OE = V
CC
V
TL(max)
Maximum fault threshold for P
D(N)
output Hi-Z
V
(PDN)
= 25
V
P
D(N)
= Hi-Z, OE = V
CC
AC Characteristics
(over recommended operating conditions unless noted)
Symbol
Parameter
Min
Max
Units
Conditions
t
WCS
Minimum CS pulse to latch data
100
ns
V
CC
= 4.5V, ENA = 0V
t
WENA
Minimum ENA pulse width to latch data
100
ns
V
CC
= 4.5V, CS = 0V
t
WOE
OE pulse width
10
50
s
V
CC
= 4.5V, OE = 0V,
V
PP
= 220V
P
D(N)
LOAD = 20K to GND
16
50
s
V
PP
= 220V,
P
D(N)
LOAD = 20K and
3000pF to GND
TT
Input transition rise and fall times
0
200
ns
V
CC
= 4.5V
T
SU1
Minimum set-up time D
N
and CS to ENA
150
ns
V
CC
= 4.5V
T
SU2
Minimum set-up time ENA to OE falling edge
150
ns
V
CC
= 4.5V
TH
Minimum hold time
5
ns
V
CC
= 4.5V
CIN
Maximum input capacitance
10
pF
Not tested, reference only
TO
P
D(N)
transition time from OE low to
1
50
s
V
PP
= 220V
P
D(N)
high/low
P
D(N)
output loaded by
20K ohms & 3000pF to GND
Electrical Characteristics
(over recommended operating conditions unless noted)
DC Characteristics
HV3922
3
HV3922
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
V
CC
Logic Supply Voltage
4.5
5.5
V
V
IN
DC Logic Input Voltage
0
V
CC
V
V
LL
V
LL
Supply Voltage
-3.5
-2.5
V
V
PP
V
PP
Supply Voltage
200
220
V
IP
D(N)
H
High-State Continuous P
D(N)
Source Current
1.7
mA
T
A
Ambient Operating Temp
-55
+125
C
CL
D
RV(N)
Load Capacitance
0
0.006
F
Notes:
1.V
PP
rise time (dv/dt) should be less than 50V/S.
2.Power-up sequence should be the following:
A)
Connect ground;
B)
Apply V
CC
;
C)
Apply V
LL
;
D)
Apply V
PP
;
E)
Set all inputs to a known state. Power-down sequence should be the reverse of the above.
Function Table
Input
Output
Data
V
TH
Internal
CS
ENA
OE
D
(N)
Level
2
Latch Q(N)
P
D(N)
D
RV(N)
Fault
H
X
H
X
Pass
Previous State
Previous State
Previous State
VFH
X
H
H
X
Pass
Previous State
Previous State
Previous State
VFH
L
L
H
H
Pass
Set
Previous State
Previous State
VFH
L
L
H
L
Pass
Reset
Previous State
Previous State
VFH
L
L
H>L
H
P/F
Set
VDH
VDL
VFH
L
L
H>L
L
P/F
Reset
HI-Z
VDH
VFH
H
X
H>L
X
Previous State
P/F
Set
VDH
VDL
VFH
P/F
Reset
HI-Z
VDH
VFH
X
H
H>L
X
Previous State
Pass
Set
VDH
VDL
VFH
Pass
Reset
HI-Z
VDH
VFH
X
X
H
X
Fail
--
HI-Z
VDL
VFL
(At Power Up)
X
X
V
IH
X
P/F
Set
VDH
VDL
VFH
Notes:
1. X indicates "Don't Care" input state (L or H).
2. The output threshold is internally tested for each P
D(N)
output; the pass condition occurs when OE = H and:
A) P
D(N)
driving high with output > V
TH (MAX)
, or may occurs if P
D(N)
driving high and output > V
TH (MIN)
and < V
TL (MAX)
.
OR
B) P
D(N)
driving Low with output < V
TH (MIN)
, or may occur if P
D(N)
driving low and output < V
TH (MAX)
and < V
TL (MIN)
.
The fail condition occurs when OE = H and conditions for "pass" are not satisfied.
3. Fault output = V
FL
indicates a fault has been detected in at least one of the P
D(N)
output loads when OE = H. All other outputs shall function normally when a fault
condition has been detected for one of the outputs. The Fault output shall remain in the low state, regardless of the state of the output which initiated the fault status, until
the next falling edge of OE. Whenever OE = L, the Fault output is forced to V
FH
, and the fault latch is reset. If the fault condition persists, the fault response repeats each
time the OE input is set to H.
4. H>L indicates falling edge (H to L).
5. HI-Z indicates no current is sourced to output P
D(N)
.
6. P/F indicates "Pass" or "Fail" fault threshold conditions.
4
HV3922
DATA LOW
and CS
10%
10%
t
WCS
90%
90%
t
SU1
90%
10%
10%
TH
t
WENA
TT
90%
10%
TT
10%
t
WOE
90%
10%
t
SU2
DATA HIGH
ENA
OE
P
D(N)
D
RV(N)
t
OH
V
PP
V
CC
V
LL
GND
D
O
Latch
Q
Set
FF
Q
Set
CLK
D
1
Latch
Q
Set
FF
Q
Set
CLK
D
2
Latch
Q
Set
FF
Q
Set
CLK
D
3
Latch
Q
Set
FF
Q
Set
CLK
OE
ENA
CS
V
PP
Voltage
Sense
Gate Control
Circuit
Drive Circuit
1
Drive Circuit
2
Drive Circuit
3
Power-Up
Circuit
Drive Circuit
Fault 0
P
D0
D
RV0
P
D1
D
RV1
P
D2
D
RV2
P
D3
D
RV3
Fault
Timing Diagram
Functional Block Diagram
5
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
12/13/010
2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
HV3922
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
4
26
25
19
27
28
1
2
3
24
23
22
21
20
12
18
17
16
15
14
13
5
11
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Pin Configurations
Package Outline
20 Pin, 300 Mil Wide Package
Pin
Function
1
D
1
2
D
2
3
D
3
4
V
LL
5
GND
6
D
RV3
7
D
RV2
8
P
D3
9
P
D2
10
P
D1
Pin
Function
11
P
D0
12
D
RV1
13
D
RV0
14
V
PP
15
V
CC
16
ENA
17
OE
18
CS
19
Fault
20
D
0
28 Pin, J-Lead Package
Pin
Function
1
D
1
2
D
2
3
D
3
4
N/C
5
V
LL
6
GND
7
N/C
8
D
RV3
9
D
RV2
10
N/C
11
P
D3
12
N/C
13
P
D2
14
N/C
Pin
Function
15
P
D1
16
P
D0
17
N/C
18
D
RV1
19
D
RV0
20
N/C
21
V
PP
22
N/C
23
V
CC
24
ENA
25
OE
26
CS
27
Fault
28
D
0
20 Pin, 300 Mil Wide Package
Pin
Function
1
S
2
S
3
S
4
G
1
5
G
2
6
G
3
7
G
4
8
S
9
S
10
S
Pin
Function
11
S
12
S
13
N/C
14
D
4
15
D
3
16
D
2
17
D
1
18
N/C
19
S
20
S
20 Pin, 300 Mil Wide DIP
HV3922C
28 Pin J-Lead Package
HV3922DJ
20 Pin, 300 Mil Wide DIP
VN2222NC
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