TELEFUNKEN Semiconductors
TDA4472-A
Rev. A1: 26.07.1995
1 (14)
Video-IF (VIF) with FPLL Demodulation and Quasi Parallel
Sound (QPS) Processing
Description
The TDA4472 is an integrated bipolar circuit for
video/sound IF (VIF/SIF) signal processing in TV/VCR
and multimedia applications.
The circuit processes TV video IF signals with negative
modulation (e.g. B/G standard) and the FM/NICAM
sound IF signals.
Features
D 5 V supply voltage; low power consumption
D Active carrier generation by FPLL principle
(frequency-phase-locked-loop) for true synchronous
demodulation
D Very linear video demodulation, good pulse response
and excellent intermodulation figures
D VCO circuit is operating on picture carrier frequency
D Alignment-free AFC without external reference
circuit
D VIF-AGC with peak sync detection
D Tuner AGC with adjustable take over point
D Alignment-free quasi parallel sound (QPS) mixer for
FM/NICAM sound IF signals
D Gain controlled intercarrier output signal
(supports digital sound processing systems)
D Separate SIF-AGC with average detection
D Two independent SIF inputs
D Package and pinning is fully compatible with the
multistandard version TDA4470, simplifies the
design of an universal IF module
Package
28 pin shrink-dual-inline-plastic (SDIP28)
TELEFUNKEN Semiconductors
TDA4472-A
Rev. A1: 26.07.1995
2 (14)
AGC
(VIF)
Tuner
AGC
AGC
(SIF)
11
10
Tuner
27
28
3
1
2
5
SIF 2
SIF 1
VCO
+
phase shift
AFC
AFC
switch
Supply
VCO
21
2 0
18
Loop
filter
19
Offset
comp.
(optional)
26
FPL
L
0
90
VIF amp
6
7
8
VIF
C
AGC
Take over point
Input switch
C
AGC
22
12
4,9,16
23
V
S
17
C
Ref
Intercarrier
(FM / NICAM)
24
FM det.
SIF amp
AFC
Video
94 8719
Video
det.
Figure 1. Block diagram
TELEFUNKEN Semiconductors
TDA4472-A
Rev. A1: 26.07.1995
3 (14)
Circuit Description
Vision IF Amplifier
The video IF signal (VIF) is fed through a SAW filter to
the differential input (Pin 6-7) of the VIF amplifier. This
amplifier consists of three AC-coupled amplifier stages.
Each differential amplifier is gain controlled by the
automatic gain control (VIF-AGC). Output signal of the
VIF amplifier is applied to the FPLL carrier generation
and the video demodulator.
Tuner- and VIF-AGC
At Pin 8 the VIF-AGC charges/discharges the AGC
capacitor to generate a control voltage for setting gain of
VIF amplifier and tuner in order to keep the video output
signal at a constant level. Therefore in case of all negative
modulated signals the sync level of the demodulated
video signal is the criterion for a fast charge/discharge of
the AGC capacitor. The control voltage (AGC voltage at
Pin 8) is transferred to an internal control signal, and is
fed to the tuner AGC to generate the tuner AGC current
at Pin 11 (open collector output). Take over point of the
tuner AGC can be adjusted at Pin 10 by a potentiometer
or an external DC voltage (from interface circuit or
microprocessor).
FPLL, VCO and AFC
The FPLL circuit (frequency phase locked loop) consists
of a frequency and phase detector to generate control volt-
age for the VCO tuning. In the locked mode the VCO is
controlled by the phase detector and in unlocked mode the
frequency detector is superimposed. The VCO operates
with an external resonance circuit (L and C parallel) and
is controlled by internal varicaps.
The VCO control voltage is also converted to a current
and represents the AFC output signal at Pin 22. A practi-
cable VCO alignment of the external coil is the
adjustment to zero AFC output current at Pin 22. At centre
frequency the AFC output current is equal to zero. The
optional potentiometer at Pin 26 allows an offset
compensation of the VCO phase for improved sound
quality (fine adjustment). Without a potentiometer (open
circuit at Pin 26) this offset compensation is not active.
The oscillator signal passes a phase shifter and supplies
the in-phase signal (0
C) and the quadrature signal
(90
C)of the generated picture carrier.
Video Demodulation and Amplifier
The video IF signal, which is applied from the gain
controlled IF amplifier, is multiplied with the inphase
component of the VCO signal. The video demodulator is
designed for low distortion and large bandwidth. The
demodulator output signal passes an integrated low pass
filter for attenuation of the residual vision carrier and is
fed to the video amplifier. The video amplifier is realized
by an operational amplifier with internal feedback and
8 MHz bandwidth (3 dB). An additional noise clipping
is provided. The video signal is fed to VIF-AGC and to the
video output buffer. This amplifier with 6 dB gain offers
easy adaption of the sound trap. For nominal video
IF modulation the video output signal at Pin 12 is 2 V
pp.
Sound IF Amplifier and SIF-AGC
The SIF amplifier is nearly identical with the 3-stage
VIF amplifier. Merely the first amplifier stage exists
twice and is switchable by a control voltage at pin 3.
Therefore with a minimal external expense it is possible
to switch between two different SAW filters. Both
SIF inputs features excellent cross-talk attenuation and
an input impedance which is independent from the
switching condition.
The SIF-AGC is related to the average level of the FM-
carrier and controls the SIF amplifier to provide a
constant SIF signal to the QPS mixer.
Quasi-Parallel-Sound (QPS) Mixer
The QPS mixer is realized by a multiplier. The SIF signal
(FM or NICAM carrier) is converted to the intercarrier
frequency by the regenerated picture carrier (quadrature
signal) which is provided from the VCO. The intercarrier
signal is fed via an output amplifier to Pin 24.
AFC Switch
The AFC output signal at Pin 22 can be controlled by a
switching voltage at Pin 19. It is possible to switch off the
AFC.
VCR Mode
For the VCR mode in a TV set (external video source
selected) it is recommendable to switch off the IF circuit.
With an external switching voltage at Pin 6 or 7 the
IF amplifiers are switched off and all signal output levels
at Pin 12, 24 are according to the internal DC voltage.
Internal Voltage Stabilizer
The internal bandgap reference ensures constant perfor-
mance independent of supply voltage and temperature.
TELEFUNKEN Semiconductors
TDA4472-A
Rev. A1: 26.07.1995
4 (14)
Pin Description
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TDA4472
V
i,SIF1
GND
C
AGC
V
i,SIF1
V
SW
V
i,VIF
V
i,VIF
C
AGC
GND
R
top
I
tun
V
o,vid
NC
V
i,SIF2
V
i,SIF2
R
comp
V
o,FM
V
S
V
AFC
V
VCO
V
VCO
Vsw
C
ref
GND
LF
94 8835
NC
NC
NC
Figure 2. Pin configuration
Pin
Symbol
Function
1, 2
V
i
,
SIF1
SIF1 input (symmetrical)
3
V
SW
Ground
4
GND
Input selector switch
5
C
AGC
SIF-AGC (time constant)
6, 7
V
i, VIF
VIF input (symmetrical)
8
C
AGC
VIF-AGC (time constant)
9
GND
Ground
10
R
top
Take over point, tuner AGC
11
I
tun
Tuner AGC output current
12
V
o,vid
Video output
13
NC
Not connected
14
NC
Not connected
15
NC
Not connected
16
GND
Ground
17
C
ref
Internal reference voltage
18
LF
Loop filter
19
V
SW
AFC switch
20, 21
V
vco
VCO circuit
22
V
AFC
AFC output
23
V
S
Supply voltage
24
V
O
,
FM
Intercarrier output
25
NC
Not connected
26
R
comp
Offset compensation
27, 28
V
i, SIF2
SIF 2 input (symmetrical)
TELEFUNKEN Semiconductors
TDA4472-A
Rev. A1: 26.07.1995
5 (14)
Absolute Maximum Ratings
Reference point pin 4 (9, 16), unless otherwise specified
Parameters
Symbol
Value
Unit
Supply voltage
Pin 23
V
S
9.0
V
Supply current
Pin 23
I
S
75
mA
Power dissipation, V
S
= +9 V
P
675
mW
Output currents
Pin 12, 24, 25
I
out
5
mA
External voltages
Pin 1, 2, 5, 6, 7, 8, 10, 12,
Pin 17, 18, 24, 26, 27, 28
Pin 20, 21
Pin 11
Pin 3, 19, 22
V
ext
+4.5
+3.5
+13.5
V
S
V
V
V
V
Junction temperature
T
j
+125
C
Storage temperature
T
stg
25 to +125
C
Electrostatic handling
*)
all pins
V
ESD
300
V
*)
Machine model in accordance with ESD S5.2 standard.
Operating Range
Parameters
Symbol
Value
Unit
Supply voltage range
Pin 23
V
S
4.5 to 9.0
V
Ambient temperature
T
amb
0 to +85
C
Thermal Resistance
Parameters
Symbol
Value
Unit
Thermal resistance:
junction-ambient, when soldered to PCB
R
thJA
55
K/W
Electrical Characteristics
V
S
= +5 V, T
amb
= +25
C; reference point pin 4 (9, 16), unless otherwise specified.
Parameters
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
DC-supply
Pin 23
Supply voltage
V
S
4.5
5.0
9.0
V
Supply current
I
S
65
75
mA
VIF-input
Pin 6-7
Input sensitivity
(RMS value)
for FPLL locked
v
in
80
120
mV
eff
Input impedance
see note 1
R
in
1.2
k
W
Input capacitance
see note 1
C
in
2
pF
VIF-AGC
Pin 8
IF gain control range
G
v
60
65
dB
AGC capacitor
C
AGC
2.2
mF
Switching voltage:
VCR mode
see note 2
V
SW
4.0
V
Switching current:
VCR mode
see note 2
I
SW
50
mA
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