Burr Brown Products
from Texas Instruments
FEATURES
APPLICATIONS
DESCRIPTION
REF-
+IN
REF+
SDI
SCLK
SDO
CDAC
SAR
COMPARATOR
OUTPUT
LATCH
and
3-STATE
DRIVER
CONVERSION
and
CONTROL
LOGIC
-IN
+IN1
+IN0
COM
NC
OSC
_
+
ADS8328
ADS8327
FS/CS
CONVST
EOC/INT/CDI
ADS8327
ADS8328
SLAS415A APRIL 2006 REVISED MAY 2006
LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL
CONVERTERS WITH SERIAL INTERFACE
Communications
2.7-V to 5.5-V Analog Supply, Low Power:
Transducer Interface
10.6 mW (+VA = 2.7 V, +VBD = 1.8 V)
Medical Instruments
500-kHz Sampling Rate
Magnetometers
Excellent DC Performance
Industrial Process Control
1.2 LSB Typ, 2 LSB Max INL
Data Acquisition Systems
0.6 LSB Typ, 1 LSB Max DNL
Automatic Test Equipment
16-Bit NMC Over Temperature
0.5 mV Max Offset Error at 2.7 V
1 mV Max Offset Error at 5 V
The ADS8327 is a low power, 16-bit, 500-ksps
Excellent AC Performance at f
i
= 10 kHz with
analog-to-digital converter with a unipolar input. The
91 dB SNR, 101 dB SFDR, 98 dB THD
device includes a 16-bit capacitor-based SAR A/D
converter with inherent sample and hold.
Built-In Conversion Clock (CCLK)
1.65 V to 5.5 V I/O Supply
The ADS8328 is based on the same core and
includes a 2-to-1 input MUX with programmable
SPI/DSP Compatible Serial
option of TAG bit output. Both the ADS8327 and
SCLK up to 50 MHz
ADS8328 offer a high-speed, wide voltage serial
Comprehensive Power-Down Modes:
interface and are capable of chain mode operation
when multiple converters are used.
Deep Powerdown
Nap Powerdown
These converters are available in a 16-lead TSSOP
package and are fully specified for operation over the
Auto Nap Powerdown
industrial -40C to +85C temperature range.
Unipolar Input Range: 0 V to V
ref
Software Reset
Low Power, High-Speed SAR Converter Family
Global CONVST (Independent of CS)
Type/Speed
500 kHz
1 MHz
Programmable Status/Polarity EOC/INT
Single
ADS8327
ADS8329
16 Bit Pseudo-Diff
Dual
ADS8328
ADS8330
16-Pin TSSOP Package
Multi-Chip Daisy Chain Mode
Programmable TAG Bit Output
Manual/Auto Channel Select Mode (ADS8328)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
ADS8327
ADS8328
SLAS415A APRIL 2006 REVISED MAY 2006
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
(1)
MAXIMUM
MAXIMUM
MAXIMUM
TRANSPORT
INTEGRAL
DIFFERENTIAL
OFFSET
PACKAGE
PACKAGE
TEMPERATURE
ORDERING
MODEL
MEDIA
LINEARITY
LINEARITY
ERROR
TYPE
DESIGNATOR
RANGE
INFORMATION
QUANTITY
(LSB)
(LSB)
(mV)
ADS8327IPW
Tube 90
ADS8327I
3
1/+2
0.8
TSSOP-16
PW
40C to 85C
Tape and reel
ADS8327IPWR
2000
ADS8327IBPW
Tube 90
ADS8327IB
2
1
0.5
TSSOP-16
PW
40C to 85C
Tape and reel
ADS8327IBPWR
2000
ADS8328IPW
Tube 90
ADS8328I
3
1/+2
0.8
TSSOP-16
PW
40C to 85C
Tape and reel
ADS8328IPWR
2000
ADS8328IBPW
Tube 90
ADS8328IB
2
1
0.5
TSSOP-16
PW
40C to 85C
Tape and reel
ADS8328IBPWR
2000
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
over operating free-air temperature range unless otherwise noted
(1)
UNIT
+IN to AGND
0.3 V to +VA + 0.3 V
Voltage
IN to AGND
0.3 V to +VA + 0.3 V
+VA to AGND
0.3 V to 7 V
Voltage range
+VBD to BDGND
0.3 V to 7 V
AGND to BDGND
0.3 V to 0.3 V
Digital input voltage to BDGND
0.3 V to +VBD + 0.3 V
Digital output voltage to BDGND
0.3 V to +VBD + 0.3 V
T
A
Operating free-air temperature range
40C to 85C
T
stg
Storage temperature range
65C to 150C
Junction temperature (T
J
max)
150C
Vapor phase (60 sec)
215C
Lead temperature, soldering
Infrared (15 sec)
220C
TSSOP-16
Package
Power dissipation
(T
J
Max - T
A
)/
JA
JA
thermal impedance
47C/W
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
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SPECIFICATIONS
ADS8327
ADS8328
SLAS415A APRIL 2006 REVISED MAY 2006
T
A
= 40C to 85C, +VA = 2.7 V, +VBD = +VA 1.5 to +1.65 V, V
ref
= 2.5 V, f
SAMPLE
= 500 kHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUT
Full-scale input voltage
(1)
+IN (IN) or (+INx COM)
0
+V
ref
V
+IN, +IN0, +IN1
AGND 0.2
+VA + 0.2
Absolute input voltage
V
IN or COM
AGND 0.2
AGND + 0.2
Input capacitance
40
45
pF
No ongoing conversion,
Input leakage current
-1
1
nA
DC Input
At dc
108
Input channel isolation, ADS8328 only
dB
V
I
= 1.25 V
pp
at 50 kHz
101
SYSTEM PERFORMANCE
Resolution
16
Bits
No missing codes
16
Bits
ADS8327IB,
2
1.2
2
ADS8328IB
INL
Integral linearity
LSB
(2)
ADS8327I, ADS8328I
3
2
3
ADS8327IB,
1
0.6
1
Differential
ADS8328IB
DNL
LSB
(2)
linearity
ADS8327I, ADS8328I
1
1
2
ADS8327IB,
0.5
0.1
0.5
ADS8328IB
E
O
Offset error
(3)
mV
ADS8327I, ADS8328I
0.8
0.1
0.8
Offset error drift
0.2
PPM/C
E
G
Gain error
0.25
0.07
0.25
%FSR
Gain error drift
0.3
PPM/C
At dc
70
CMRR
Common mode rejection ratio
dB
V
I
= 0.4 V
pp
at 1 MHz
50
Noise
33
V RMS
PSRR
Power supply rejection ratio
At FFFFh output code
(3)
78
dB
SAMPLING DYNAMICS
t
CONV
Conversion time
18
CCLK
t
SAMPLE1
Manual trigger
3
Acquisition time
CCLK
t
SAMPLE2
Auto trigger
3
Throughput rate
500
kHz
Aperture delay
5
ns
Aperture jitter
10
ps
Step response
100
ns
Overvoltage recovery
100
ns
(1)
Ideal input span, does not include gain or offset error.
(2)
LSB means least significant bit
(3)
Measured relative to an ideal full-scale input [+IN (IN)] of 2.5 V when +VA = 2.7 V.
3
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ADS8327
ADS8328
SLAS415A APRIL 2006 REVISED MAY 2006
SPECIFICATIONS (continued)
T
A
= 40C to 85C, +VA = 2.7 V, +VBD = +VA 1.5 to +1.65 V, V
ref
= 2.5 V, f
SAMPLE
= 500 kHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DYNAMIC CHARACTERISTICS
V
IN
= 2.5 V
pp
at 10 kHz
-98
THD
Total harmonic distortion
(4)
dB
V
IN
= 2.5 V
pp
at 100 kHz
-83.5
V
IN
= 2.5 V
pp
at 10 kHz
88.5
SNR
Signal-to-noise ratio
dB
V
IN
= 2.5 V
pp
at 100 kHz
85
V
IN
= 2.5 V
pp
at 10 kHz
88.5
SINAD
Signal-to-noise + distortion
dB
V
IN
= 2.5 V
pp
at 100 kHz
81
V
IN
= 2.5 V
pp
at 10 kHz
101
SFDR
Spurious free dynamic range
dB
V
IN
= 2.5 V
pp
at 100 kHz
84
-3dB Small signal bandwidth
30
MHz
CLOCK
Internal conversion clock frequency
10.5
11
12.2
MHz
Used as I/O clock only
33
SCLK External serial clock
MHz
As I/O clock and conversion clock
1
21
EXTERNAL VOLTAGE REFERENCE INPUT
V
ref
(REF+ REF)
3.6 V
+VA
2.7 V
0.3
2.525
Input reference
V
ref
V
range
(REF) AGND
0.1
0.1
Resistance
(5)
Reference input
80
k
DIGITAL INPUT/OUTPUT
Logic family -- CMOS
V
IH
High-level input voltage
(+VA 1.5) V
+VBD
1.65 V
0.65
(+VBD)
+VBD + 0.3
V
V
IL
Low-level input voltage
(+VA 1.5) V
+VBD
1.65 V
0.3
0.35
(+VBD)
V
I
I
Input current
V
I
= +VBD or BDGND
-50
50
nA
C
i
Input capacitance
5
pF
(+VA 1.5) V
+VBD
1.65 V,
V
OH
High-level output voltage
+VBD 0.6
+VBD
V
I
O
= 100
A
(+VA 1.5) V
+VBD
1.65 V,
V
OL
Low-level output voltage
0
0.4
V
I
O
= 100
A
C
O
Output capacitance
5
pF
C
L
Load capacitance
30
pF
Data format -- straight binary
POWER SUPPLY REQUIREMENTS
+VBD
1.65
+VA
1.5 (+VA)
V
Power supply
voltage
+VA
2.7
3.6
V
500-kHz Sample rate
3.8
5
mA
Supply current
Nap mode
0.2
0.4
PD Mode
2
50
nA
Buffer I/O supply current
500 KSPS
0.2
mA
Power dissipation
+VA = 2.7 V, +VBD = 1.8 V
10.6
14
mW
TEMPERATURE RANGE
T
A
Operating free-air temperature
40
85
C
(4)
Calculated on the first nine harmonics of the input frequency
(5)
Can vary 30%
4
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SPECIFICATIONS
ADS8327
ADS8328
SLAS415A APRIL 2006 REVISED MAY 2006
T
A
= 40C to 85C, +VA = 5 V, +VBD = +5.5 V to +1.65 V, V
ref
= 4.096 V, f
SAMPLE
= 500 kHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUT
Full-scale input voltage
(1)
+IN (IN) or (+INx COM)
0
+V
ref
V
+IN, +IN0, +IN1
AGND 0.2
+VA + 0.2
Absolute input voltage
V
IN or COM
AGND 0.2
AGND + 0.2
Input capacitance
40
45
pF
No ongoing conversion,
Input leakage current
-1
1
nA
DC Input
At dc
109
Input channel isolation, ADS8328 only
dB
V
I
= 1.25 V
pp
at 50 kHz
101
SYSTEM PERFORMANCE
Resolution
16
Bits
No missing codes
16
Bits
ADS8327IB,
2
1.5
2
ADS8328IB
INL
Integral linearity
LSB
(2)
ADS8327I, ADS8328I
-3
2
3
ADS8327IB,
1
0.7
1
Differential
ADS8328IB
DNL
LSB
(2)
linearity
ADS8327I, ADS8328I
1
1
2
ADS8327IB,
1
0.4
1
ADS8328IB
E
O
Offset error
(3)
mV
ADS8327I, ADS8328I
1.25
0.4
1.25
Offset error drift
0.5
PPM/C
E
G
Gain error
0.25
0.07
0.25
%FSR
Gain error drift
0.3
PPM/C
At dc
70
CMRR
Common mode rejection ratio
dB
V
I
= 1 V
pp
at 1 MHz
50
Noise
33
V RMS
PSRR
Power supply rejection ratio
At FFFFh output code
(3)
78
dB
SAMPLING DYNAMICS
t
CONV
Conversion time
18
CCLK
t
SAMPLE
Manual trigger
3
1
Acquisition time
CCLK
t
SAMPLE
Auto trigger
3
2
Throughput rate
500
kHz
Aperture delay
5
ns
Aperture jitter
10
ps
Step response
100
ns
Overvoltage recovery
100
ns
(1)
Ideal input span, does not include gain or offset error.
(2)
LSB means least significant bit
(3)
Measured relative to an ideal full-scale input [+IN (IN)] of 4.096 V when +VA = 5 V.
5
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