1
Data sheet acquired from Harris Semiconductor
SCHS234
Features
CD74AC138, CD74ACT138 . . . . . . . . . . . . . . . Inverting
CD74AC238, CD74ACT238 . . . . . . . . . . . Non-Inverting
Buffered Inputs
Typical Propagation Delay
- 5ns at V
CC
= 5V, T
A
= 25
o
C, C
L
= 50pF
Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
SCR-Latchup-Resistant CMOS Process and Circuit
Design
Speed of Bipolar FASTTM/AS/S with Significantly
Reduced Power Consumption
Balanced Propagation Delays
AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
24mA Output Drive Current
- Fanout to 15 FASTTM ICs
- Drives 50
Transmission Lines
Pinout
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
(PDIP, SOIC)
TOP VIEW
Description
The
CD74AC138,
CD74ACT138,
CD74AC238,
and
CD74ACT238 are 3-to-8-line decoders/demultiplexers that
utilize the Harris Advanced CMOS Logic technology. Both
circuits have three binary select inputs (A0, A1, and A2). If
the device is enabled, these inputs determine which one of
the eight normally HIGH outputs of the AC/ACT138 will go
LOW or which on of the normally LOW outputs of the
AC/ACT238 will go HIGH. Two active LOW and one active
HIGH enables (E1, E2 and E3) are provided to simplify the
cascading of these devices.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
A0
A1
A2
E1
E2
E3
GND
AC/ACT138 Y7
V
CC
Y1 AC/ACT138
Y2 AC/ACT138
Y3 AC/ACT138
Y4 AC/ACT138
Y5 AC/ACT138
Y6 AC/ACT138
Y0 AC/ACT138
AC/ACT238 Y7
Y0 AC/ACT238
Y1 AC/ACT238
Y2 AC/ACT238
Y3 AC/ACT238
Y4 AC/ACT238
Y5 AC/ACT238
Y6 AC/ACT238
Ordering Information
PART
NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CD74AC138E
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld PDIP
E16.3
CD74ACT138E
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld PDIP
E16.3
CD74AC238E
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld PDIP
E16.3
CD74ACT238E
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld PDIP
E16.3
CD74AC138M
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld SOIC
M16.15
CD74ACT138M
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld SOIC
M16.15
CD74AC238M
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld SOIC
M16.15
CD74ACT238M
0 to 70
o
C, -40 to 85,
-55 to 125
16 Ld SOIC
M16.15
NOTES:
17. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
18. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or Harris
customer service for ordering information.
September 1998
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FASTTM is a Trademark of Fairchild Semiconductor.
Copyright
Harris Corporation 1998
CD74AC138, CD74ACT138,
CD74AC238, CD74ACT238
3-to-8-Line Decoders/Demultiplexers
File Number
1909.1
[ /Title
(CD74
AC138
,
CD74
ACT13
8,
CD74
AC238
,
CD74
ACT23
8)
/Sub-
ject (3-
to-8-
Line
Decod-
ers/De
multi-
plex-
ers)
/Autho
r ()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
Advan
ced
2
Functional Diagram
15
14
13
12
10
7
9
11
1
2
3
5
6
4
E3
E2
E1
A2
A1
A0
Y0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
AC/ACT
238
AC/ACT
138
CD74AC/ACT138 TRUTH TABLE
INPUTS
OUTPUTS
ENABLE
ADDRESS
E
3
(NOTE 4)
E0
A
2
A
1
A
0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
H
H
H
H
H
L
H
H
H
H
H
L
H
L
L
H
H
H
H
L
H
H
H
H
L
H
L
L
H
H
H
H
H
L
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
CD74AC/ACT238 TRUTH TABLE
INPUTS
OUTPUTS
ENABLE
ADDRESS
E
3
(NOTE 4)
E0
A
2
A
1
A
0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
H
X
X
X
L
L
L
L
L
L
L
L
L
X
X
X
X
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
L
H
L
L
L
L
L
L
H
L
L
H
L
L
L
H
L
L
L
L
L
H
L
L
H
H
L
L
L
H
L
L
L
L
H
L
H
L
L
L
L
L
L
H
L
L
L
H
L
H
L
H
L
L
L
L
L
H
L
L
H
L
H
H
L
L
L
L
L
L
L
H
L
H
L
H
H
H
L
L
L
L
L
L
L
H
NOTES:
19. H = High Level, L = Low Level, X = Don't Care
20. E0 = E1 + E2
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
3
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . .
20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
50mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
50mA
DC V
CC
or Ground Current, I
CC or
I
GND
(Note 5)
. . . . . . . . .
100mA
Operating Conditions
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
(Note 6)
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
Thermal Resistance (Typical, Note 7)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
21. For up to 4 outputs per device, add
25mA for each additional output.
22. Unless otherwise specified, all voltages are referenced to ground.
23.
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO
85
o
C
-55
o
C TO
125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
AC TYPES
High Level Input Voltage
V
IH
-
-
1.5
1.2
-
1.2
-
1.2
-
V
3
2.1
-
2.1
-
2.1
-
V
5.5
3.85
-
3.85
-
3.85
-
V
Low Level Input Voltage
V
IL
-
-
1.5
-
0.3
-
0.3
-
0.3
V
3
-
0.9
-
0.9
-
0.9
V
5.5
-
1.65
-
1.65
-
1.65
V
High Level Output Voltage
V
OH
V
IH
or V
IL
-0.05
1.5
1.4
-
1.4
-
1.4
-
V
-0.05
3
2.9
-
2.9
-
2.9
-
V
-0.05
4.5
4.4
-
4.4
-
4.4
-
V
-4
3
2.58
-
2.48
-
2.4
-
V
-24
4.5
3.94
-
3.8
-
3.7
-
V
-75
(Note 8, 9)
5.5
-
-
3.85
-
-
-
V
-50
(Note 8, 9)
5.5
-
-
-
-
3.85
-
V
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
4
Low Level Output Voltage
V
OL
V
IH
or V
IL
0.05
1.5
-
0.1
-
0.1
-
0.1
V
0.05
3
-
0.1
-
0.1
-
0.1
V
0.05
4.5
-
0.1
-
0.1
-
0.1
V
12
3
-
0.36
-
0.44
-
0.5
V
24
4.5
-
0.36
-
0.44
-
0.5
V
75
(Note 8, 9)
5.5
-
-
-
1.65
-
-
V
50
(Note 8, 9)
5.5
-
-
-
-
-
1.65
V
Input Leakage Current
I
I
V
CC
or
GND
-
5.5
-
0.1
-
1
-
1
A
Quiescent Supply Current
MSI
I
CC
V
CC
or
GND
0
5.5
-
8
-
80
-
160
A
ACT TYPES
High Level Input Voltage
V
IH
-
-
4.5 to
5.5
2
-
2
-
2
-
V
Low Level Input Voltage
V
IL
-
-
4.5 to
5.5
-
0.8
-
0.8
-
0.8
V
High Level Output Voltage
V
OH
V
IH
or V
IL
-0.05
4.5
4.4
-
4.4
-
4.4
-
V
-24
4.5
3.94
-
3.8
-
3.7
-
V
-75
(Note 8, 9)
5.5
-
-
3.85
-
-
-
V
-50
(Note 8, 9)
5.5
-
-
-
-
3.85
-
V
Low Level Output Voltage
V
OL
V
IH
or V
IL
0.05
4.5
-
0.1
-
0.1
-
0.1
V
24
4.5
-
0.36
-
0.44
-
0.5
V
75
(Note 8, 9)
5.5
-
-
-
1.65
-
-
V
50
(Note 8, 9)
5.5
-
-
-
-
-
1.65
V
Input Leakage Current
I
I
V
CC
or
GND
-
5.5
-
0.1
-
1
-
1
A
Quiescent Supply Current
MSI
I
CC
V
CC
or
GND
0
5.5
-
8
-
80
-
160
A
Additional Supply Current per
Input Pin TTL Inputs High
1 Unit Load
I
CC
V
CC
-2.1
-
4.5 to
5.5
-
2.4
-
2.8
-
3
mA
NOTES:
24. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
25. Test verifies a minimum 50
transmission-line-drive capability at 85
o
C, 75
at 125
o
C.
ACT Input Load Table
INPUT
UNIT LOAD
A0-A2
0.83
E1, E2
1
E3
0.42
NOTE: Unit load is
I
CC
limit specified in DC Electrical Specifications
Table, e.g., 2.4mA max at 25
o
C.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO
85
o
C
-55
o
C TO
125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
5
Switching Specifications
Input t
r
, t
f
= 3ns, C
L
= 50pF (Worst Case)
PARAMETER
SYMBOL
V
CC
(V)
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
AC TYPES
Propagation Delay,
An to Output
(CD74AC/ACT138)
t
PLH
, t
PHL
1.5
-
-
125
-
-
138
ns
3.3
(Note 11)
4
-
14
3.9
-
15.4
ns
5
(Note 12)
2.8
-
10
2.8
-
11
ns
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT138)
t
PLH
, t
PHL
1.5
-
-
114
-
-
125
ns
3.3
3.6
-
12.7
3.5
-
14
ns
5
2.6
-
9.1
2.5
-
10
ns
Propagation Delay,
E3 to Output
(CD74AC/ACT138)
t
PLH
, t
PHL
1.5
-
-
125
-
-
138
ns
3.3
4
-
14
3.9
-
15.4
ns
5
2.8
-
10
2.8
-
11
ns
Propagation Delay,
An to Output
(CD74AC/ACT238)
t
PLH
, t
PHL
1.5
-
-
170
-
-
187
ns
3.3
5.4
-
19.1
5.3
-
21
ns
5
3.9
-
13.6
3.8
-
15
ns
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT238)
t
PLH
, t
PHL
1.5
-
-
135
-
-
149
ns
3.3
4.3
-
15.2
4.2
-
16.7
ns
5
3.1
-
10.7
3
-
11.9
ns
Propagation Delay,
E3 to Output
(CD74AC/ACT238)
t
PLH
, t
PHL
1.5
-
-
189
-
-
208
ns
3.3
6
-
21.1
5.8
-
23.2
ns
5
4.3
-
15.1
4.2
-
16.6
ns
Input Capacitance
C
I
-
-
-
10
-
-
10
pF
Power Dissipation Capacitance
C
PD
(Note 13)
-
-
110
-
-
110
-
pF
ACT TYPES
Propagation Delay,
An to Output
(CD74AC/ACT138)
t
PLH
, t
PHL
5
(Note 12)
3.1
-
10.9
3
-
12
ns
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT138)
t
PLH
, t
PHL
5
2.7
-
9.5
2.6
-
10.5
ns
Propagation Delay,
E3 to Output
(CD74AC/ACT138)
t
PLH
, t
PHL
5
2.8
-
10
2.8
-
11
ns
Propagation Delay,
An to Output
(CD74AC/ACT238)
t
PLH
, t
PHL
5
4
-
14.2
3.9
-
15.6
ns
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT238)
t
PLH
, t
PHL
5
3.7
-
12.9
3.6
-
14.2
ns
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
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