1
Data sheet acquired from Harris Semiconductor
SCHS142F
September 1997 - Revised October 2003
Features
Overriding Reset Terminates Output Pulse
Triggering From the Leading or Trailing Edge
Q and Q Buffered Outputs
Separate Resets
Wide Range of Output-Pulse Widths
Schmitt Trigger on Both A and B Inputs
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30%of V
CC
at
V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1
A at V
OL
, V
OH
Description
The 'HC123, 'HCT123, CD74HC423 and CD74HCT423 are
dual monostable multivibrators with resets. They are all
retriggerable and differ only in that the 123 types can be
triggered by a negative to positive reset pulse; whereas the
423 types do not have this feature. An external resistor (R
X
)
and an external capacitor (C
X
) control the timing and the
accuracy for the circuit. Adjustment of Rx and C
X
provides a
wide range of output pulse widths from the Q and Q
terminals. Pulse triggering on the A and B inputs occur at a
particular voltage level and is not related to the rise and fall
times of the trigger pulses.
Once triggered, the output pulse width may be extended by
retriggering inputs A and B. The output pulse can be
terminated by a LOW level on the Reset (R) pin. Trailing
edge triggering (A) and leading edge triggering (B) inputs
are provided for triggering from either edge of the input
pulse. If either Mono is not used each input on the unused
device (A, B, and R) must be terminated high or low.
The minimum value of external resistance, Rx is typically
5k
. The minimum value external capacitance, CX, is 0pF.
The calculation for the pulse width is t
W
= 0.45 R
X
C
X
at
V
CC
= 5V.
Ordering Information
PART NUMBER
TEMP. RANGE (
o
C)
PACKAGE
CD54HC123F3A
-55 to 125
16 Ld CERDIP
CD54HCT123F3A
-55 to 125
16 Ld CERDIP
CD74HC123E
-55 to 125
16 Ld PDIP
CD74HC123M
-55 to 125
16 Ld SOIC
CD74HC123MT
-55 to 125
16 Ld SOIC
CD74HC123M96
-55 to 125
16 Ld SOIC
CD74HC123NSR
-55 to 125
16 Ld SOP
CD74HC123PW
-55 to 125
16 Ld TSSOP
CD74HC123PWR
-55 to 125
16 Ld TSSOP
CD74HC123PWT
-55 to 125
16 Ld TSSOP
CD74HC423E
-55 to 125
16 Ld PDIP
CD74HC423M
-55 to 125
16 Ld SOIC
CD74HC423MT
-55 to 125
16 Ld SOIC
CD74HC423M96
-55 to 125
16 Ld SOIC
CD74HC423NSR
-55 to 125
16 Ld SOP
CD74HCT123E
-55 to 125
16 Ld PDIP
CD74HCT123M
-55 to 125
16 Ld SOIC
CD74HCT123MT
-55 to 125
16 Ld SOIC
CD74HCT123M96
-55 to 125
16 Ld SOIC
CD74HCT423E
-55 to 125
16 Ld PDIP
CD74HCT423MT
-55 to 125
16 Ld SOIC
CD74HCT423M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
2003, Texas Instruments Incorporated
CD54/74HC123, CD54/74HCT123,
CD74HC423, CD74HCT423
High-Speed CMOS Logic Dual Retriggerable
Monostable Multivibrators with Resets
[ /Title
(CD74
HC123
,
CD74
HCT12
3,
CD74
HC423
,
CD74
HCT42
3)
/Sub-
ject
(High
Speed
2
Pinout
CD54HC123, CD54HCT123
(CERDIP)
CD74HC123
(PDIP, SOIC, SOP, TSSOP)
CD74HC423
(PDIP, SOIC, SOP)
CD74HCT123, CD74HCT423
(PDIP, SOIC)
TOP VIEW
Functional Diagram
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
1A
1B
1R
1Q
2Q
2C
X
GND
2R
X
C
X
V
CC
1C
X
1Q
2Q
2R
2B
2A
1R
X
C
X
2R
11
2A
9
10
5
12
2Q
2Q
2B
MONO 2
V
CC
6
7
2Cx
2RxCx
1R
3
1A
2
1
13
4
1Q
1Q
1B
MONO 1
V
CC
14
15
1Cx
1RxCx
1Cx
1Rx
2Cx
2Rx
TRUTH TABLE
INPUTS
OUTPUTS
A
B
R
Q
Q
CD74HC/HCT123
H
X
H
L
H
X
L
H
L
H
L
H
H
H
X
X
L
L
H
L
H
CD74HC/HCT423
H
X
H
L
H
X
L
H
L
H
L
H
H
H
X
X
L
L
H
H = High Voltage Level, L = Low Voltage Level,
X = Don't Care.
CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423
3
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . .
20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
20mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
25mA
DC V
CC
or Ground Current, I
CC or
I
GND
. . . . . . . . . . . . . . . . . .
50mA
Operating Conditions
Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
Package Thermal Impedance,
JA
(see Note 1):
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
o
C/W
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
o
C/W
NS (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
o
C/W
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . 108
o
C/W
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HC TYPES
High Level Input
Voltage
V
IH
-
-
2
1.5
-
-
1.5
-
1.5
-
V
4.5
3.15
-
-
3.15
-
3.15
-
V
6
4.2
-
-
4.2
-
4.2
-
V
Low Level Input
Voltage
V
IL
-
-
2
-
-
0.5
-
0.5
-
0.5
V
4.5
-
-
1.35
-
1.35
-
1.35
V
6
-
-
1.8
-
1.8
-
1.8
V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02
2
1.9
-
-
1.9
-
1.9
-
V
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-0.02
6
5.9
-
-
5.9
-
5.9
-
V
High Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
-5.2
6
5.48
-
-
5.34
-
5.2
-
V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02
2
-
-
0.1
-
0.1
-
0.1
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
0.02
6
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-
-
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
5.2
6
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I
I
V
CC
or
GND
-
6
-
-
0.1
-
1
-
1
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
6
-
-
8
-
80
-
160
A
CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423
4
HCT TYPES
High Level Input
Voltage
V
IH
-
-
4.5 to
5.5
2
-
-
2
-
2
-
V
Low Level Input
Voltage
V
IL
-
-
4.5 to
5.5
-
-
0.8
-
0.8
-
0.8
V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
High Level Output
Voltage
TTL Loads
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I
I
V
CC
and
GND
0
5.5
-
0.1
-
1
-
1
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
5.5
-
-
8
-
80
-
160
A
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
I
CC
(Note 2)
V
CC
-2.1
-
4.5 to
5.5
-
100
360
-
450
-
490
A
NOTE:
2. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HCT Input Loading Table
INPUT
UNIT LOADS
All
0.35
NOTE: Unit Load is
I
CC
limit specified in DC Electrical Table, e.g.
360
A max at 25
o
C.
Prerequisite for Switching Specifications
PARAMETER
SYMBOL
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
HC TYPES
Minimum Input,
Pulse Width
t
WL
A
2
100
-
-
125
-
-
150
-
-
ns
4.5
20
-
-
25
-
-
30
-
-
ns
6
17
-
-
21
-
-
26
-
-
ns
B
t
WH
2
100
-
-
125
-
-
150
-
-
ns
4.5
20
-
-
25
-
-
30
-
-
ns
6
17
-
-
21
-
-
26
-
-
ns
CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423
5
R
t
WL
2
100
-
-
125
-
-
150
-
150
ns
4.5
20
-
-
25
-
-
30
-
30
ns
6
17
-
-
21
-
-
26
-
26
ns
A and B Hold Time
t
H
2
50
-
-
65
-
-
75
-
75
ns
4.5
10
-
-
13
-
-
15
-
15
ns
6
9
-
-
11
-
-
13
-
13
ns
Reset Removal Time
t
REM
2
50
-
-
65
-
-
75
-
75
ns
4.5
10
-
-
13
-
-
15
-
15
ns
6
9
-
-
11
-
-
13
-
13
ns
Retrigger Time Number
t
rT
5
-
-
-
-
-
-
-
-
-
ns
R
X
= 10K
, C
X
= 0
-
50
-
-
63
-
-
76
-
ns
Output Pulse Width
t
W
5
Q or Q
R
X
= 10K
, C
X
= 10nF
40
-
50
38.7
-
51.3
38.2
-
51.8
s
HCT TYPES
Minimum Input,
Pulse Width
t
WL
5
-
A
20
-
-
25
-
-
30
-
-
ns
B
t
WH
20
-
-
25
-
-
30
-
-
ns
R
t
WL
20
-
-
25
-
-
30
-
-
ns
A and B Hold Time
t
H
5
10
-
-
13
-
-
15
-
-
ns
Reset Removal Time
t
REM
5
10
-
-
13
-
-
15
-
ns
Retrigger Time Number
(Note 3)
R
X
= 10K
, C
X
= 0
t
rT
5
-
50
-
-
63
-
-
76
-
ns
Output Pulse Width Q or Q
t
W
5
40
-
50
38.7
-
51.3
38.2
-
51.8
s
R
X
= 10K
, C
X
= 10nF
NOTE:
3. Time to trigger depends on the values of R
X
and C
X
. The output pulse width can only be extended when the time between the active-
going edges of the trigger input pulses meet the minimum retrigger time requirement.
Prerequisite for Switching Specifications
(Continued)
PARAMETER
SYMBOL
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423
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