CD54HC4511, CD74HC4511, CD74HCT4511
BCD TO 7 SEGMENT LATCH/DECODER/DRIVERS
SCHS279D - DECEMBER 1998 - REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
2-V to 6-V V
CC
Operation ('HC4511)
D
4.5-V to 5.5-V V
CC
Operation
(CD74HCT4511)
D
High-Output Sourcing Capability
- 7.5 mA at 4.5 V (CD74HCT4511)
- 10 mA at 6 V ('HC4511)
D
Input Latches for BCD Code Storage
D
Lamp Test and Blanking Capability
D
Balanced Propagation Delays and
Transition Times
D
Significant Power Reduction Compared to
LSTTL Logic ICs
D
'HC4511
- High Noise Immunity,
N
IL
or N
IH
=
30% of V
CC
at V
CC
= 5 V
D
CD74HCT4511
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8 V Maximum, V
IH
= 2 V Minimum
- CMOS Input Compatibility, I
I
1
A
at
V
OL
, V
OH
description/ordering information
The CD54HC4511, CD74HC4511, and CD74HCT4511 are BCD-to-7 segment latch/decoder/drivers with four
address inputs (D
0
-D
3
), an active-low blanking (BL) input, lamp-test (LT) input, and a latch-enable (LE) input
that, when high, enables the latches to store the BCD inputs. When LE is low, the latches are disabled, making
the outputs transparent to the BCD inputs.
These devices have standard-size output transistors, but are capable of sourcing (at standard V
OH
levels) up
to 7.5 mA at 4.5 V. The HC types can supply up to 10 mA at 6 V.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP - E
Tube of 25
CD74HC4511E
CD74HC4511E
PDIP - E
Tube of 25
CD74HCT4511E
CD74HCT4511E
Tube of 40
CD74HC4511M
-55
C to 125
C
SOIC - M
Reel of 2500
CD74HC4511M96
HC4511M
-55
C to 125
C
SOIC - M
Reel of 250
CD74HC4511MT
HC4511M
TSSOP - PW
Reel of 2000
CD74HC4511PWR
HJ4511
TSSOP - PW
Reel of 250
CD74HC4511PWT
HJ4511
CDIP - F
Tube of 25
CD54HC4511F3A
CD54HC4511F3A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D
1
D
2
LT
BL
LE
D
3
D
0
GND
V
CC
f
g
a
b
c
d
e
BCD
Inputs
BCD
Inputs
7-Segment
Outputs
CD54HC4511 . . . F PACKAGE
CD74HC4511 . . . E, M, OR PW PACKAGE
CD74HCT4511 . . . E PACKAGE
(TOP VIEW)
0
1
2
3
4
5
6
7
8
9
DISPLAY
a
b
c
d
e
f
g
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
CD54HC4511, CD74HC4511, CD74HCT4511
BCD TO 7 SEGMENT LATCH/DECODER/DRIVERS
SCHS279D - DECEMBER 1998 - REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OUTPUTS
LE
BL
LT
D3
D2
D1
D0
a
b
c
d
e
f
g
DISPLAY
X
X
L
X
X
X
X
H
H
H
H
H
H
H
8
X
L
H
X
X
X
X
L
L
L
L
L
L
L
Blank
L
H
H
L
L
L
L
H
H
H
H
H
H
L
0
L
H
H
L
L
L
H
L
H
H
L
L
L
L
1
L
H
H
L
L
H
L
H
H
L
H
H
L
H
2
L
H
H
L
L
H
H
H
H
H
H
L
L
H
3
L
H
H
L
H
L
L
L
H
H
L
L
H
H
4
L
H
H
L
H
L
H
H
L
H
H
L
H
H
5
L
H
H
L
H
H
L
L
L
H
H
H
H
H
6
L
H
H
L
H
H
H
H
H
H
L
L
L
L
7
L
H
H
H
L
L
L
H
H
H
H
H
H
H
8
L
H
H
H
L
L
H
H
H
H
L
L
H
H
9
L
H
H
H
L
H
L
L
L
L
L
L
L
L
Blank
L
H
H
H
L
H
H
L
L
L
L
L
L
L
Blank
L
H
H
H
H
L
L
L
L
L
L
L
L
L
Blank
L
H
H
H
H
L
H
L
L
L
L
L
L
L
Blank
L
H
H
H
H
H
L
L
L
L
L
L
L
L
Blank
L
H
H
H
H
H
H
L
L
L
L
L
L
L
Blank
H
H
H
X
X
X
X
X = Don't care
Depends on BCD code previously applied when LE = L
NOTE: Display is blank for all illegal input codes (BCD > HLLH).
function diagram
7
1
2
6
5
4
D0
D1
D2
D3
LE
BL
LT
3
VSS = 8
VDD = 16
13
12
11
10
9
15
14
a
b
c
d
e
f
g
Latch
Decoder
Driver
7-Segment
Outputs
BCD
Inputs
CD54HC4511, CD74HC4511, CD74HCT4511
BCD TO 7 SEGMENT LATCH/DECODER/DRIVERS
SCHS279D - DECEMBER 1998 - REVISED OCTOBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram
15
f
BL
4
6
2
1
7
5
14
9
11
12
13
a
b
c
e
g
3
LT
D3
D2
D1
D0
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
LE
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
Latch
Latch
Latch
Latch
LE
LE
10 d
CD54HC4511, CD74HC4511, CD74HCT4511
BCD TO 7 SEGMENT LATCH/DECODER/DRIVERS
SCHS279D - DECEMBER 1998 - REVISED OCTOBER 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input diode current, I
IK
(V
I
< -0.5 V or V
I
> V
CC
+ 0.5 V) ) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . .
Output diode current, I
OK
(V
O
< -0.5 V or V
O
> V
CC
+ 0.5V) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . .
Continuous output source or sink current per output, I
O
(V
O
= 0 to V
CC
)
25 mA
. . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): E package
67
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M package
73
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
108
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (during soldering):
At distance 1/16
1/32 in (1.59
0.79 mm) from case for 10 s maximum
265
C
. . . . . . . . . . . . . . . . . . . . .
Unit inserted into a PC board (minimum thickness 1/16 in, 1.59 mm),
with solder contacting lead tips only
300
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature, T
stg
-65 to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions for 'HC4511 (see Note 3)
TA = 25
C
TA = -55
C
TO 125
C
TA = -40
C
TO 85
C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2
6
2
6
2
6
V
VCC = 2 V
1.5
1.5
1.5
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
3.15
V
VIH
High-level input voltage
VCC = 6 V
4.2
4.2
4.2
V
VCC = 2 V
0.5
0.5
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
1.35
V
VIL
Low-level input voltage
VCC = 6 V
1.8
1.8
1.8
V
VI
Input voltage
0
VCC
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
VCC = 2 V
1000
1000
1000
tt
Input transition (rise and fall) time
VCC = 4.5 V
500
500
500
ns
tt
Input transition (rise and fall) time
VCC = 6 V
400
400
400
ns
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CD54HC4511, CD74HC4511, CD74HCT4511
BCD TO 7 SEGMENT LATCH/DECODER/DRIVERS
SCHS279D - DECEMBER 1998 - REVISED OCTOBER 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions for CD74HCT4511 (see Note 4)
TA = 25
C
TA = -55
C
TO 125
C
TA = -40
C
TO 85
C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
4.5
5.5
4.5
5.5
V
VIH
High-level input voltage
2
2
2
V
VIL
Low-level input voltage
0.8
0.8
0.8
V
VI
Input voltage
VCC
VCC
VCC
V
VO
Output voltage
VCC
VCC
VCC
V
tt
Input transition (rise and fall) time
500
500
500
ns
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
'HC4511
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
TA = -55
C
TO 125
C
TA = -40
C
TO 85
C
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
1.9
1.9
1.9
IOH = -20
A
4.5 V
4.4
4.4
4.4
VOH
VI = VIH or VIL
IOH = -20
A
6 V
5.9
5.9
5.9
V
VOH
VI = VIH or VIL
IOH = -7.5 mA
4.5 V
3.98
3.7
3.84
V
IOH = -10 mA
6 V
5.48
5.2
5.34
2 V
0.1
0.1
0.1
IOL = 20
A
4.5 V
0.1
0.1
0.1
VOL
VI = VIH or VIL
IOL = 20
A
6 V
0.1
0.1
0.1
V
VOL
VI = VIH or VIL
IOL = 4 mA
4.5 V
0.26
0.4
0.33
V
IOL = 5.2 mA
6 V
0.26
0.4
0.33
II
VI = VCC or 0
6 V
0.1
1
1
A
ICC
VI = VCC or 0,
IO = 0
6 V
8
160
80
A
Ci
10
10
10
pF
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