8-Bit Register
CY54/74FCT377T
SCCS023 - May1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
2000, Texas Instruments Incorporated
1CY54/74FCT377T
Features
Function, pinout and drive compatible with FCT and
F logic
FCT-C speed at 5.2 ns max. (Com'l)
FCT-A speed at 7.2 ns max. (Com'l)
Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
Matched rise and fall times
ESD > 2000V
Fully compatible with TTL input and output logic levels
Sink Current
64 mA (Com'l),
32 mA (Mil)
Source Current
32 mA (Com'l),
12 mA (Mil)
Clock Enable for address and data synchronization
application
Eight edge-triggered D flip-flops
Extended commercial range of
-
40C to +85C
Functional Description
The FCT377T has eight triggered D-type flip-flops with
individual D inputs. The common buffered clock inputs (CP)
loads all flip-flops simultaneously when the Clock Enable (CE)
is LOW. The register is fully edge-triggered. The state of each
D input, one set-up time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop's O out-
put. The CE input must be stable only one set-up time prior to
the LOW-to-HIGH clock transition for predictable operation.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
Pin Configurations
4
8
9
10
11
12
7 6 5
1516 17 18
3
2
1
20
13
14
19
D
3
D
2
O
1
D
6
D
5
D
7
CP
V
CC
GND
O
5
Top View
D
1
LCC
CE
O
0
D
0
O
3
D
4
O
4
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
13
14
V
CC
15
SOIC/QSOP
Top View
O
6
O
2
O
7
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
CE
GND
CP
D
Q
O
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
CE
O
7
CP
CE
D
0
O
0
D
1
O
1
D
2
O
2
D
3
O
3
D
4
O
4
D
5
O
5
D
6
O
6
D
7
O
7
D
0
CP
D
Q
O
1
CP
D
Q
O
2
CP
D
Q
O
3
CP
D
Q
O
4
CP
D
Q
O
5
CP
D
Q
O
6
CP
D
Q
O
7
Logic Symbol
CY54/74FCT377T
2
Maximum Ratings
[2, 3]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature ................................. 65
C to +150
C
Ambient Temperature
with Power Applied...................................... 65
C to +135
C
Supply Voltage to Ground Potential ............... 0.5V to +7.0V
DC Input Voltage ........................................... 0.5V to +7.0V
DC Output Voltage......................................... 0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ...... 120 mA
Power Dissipation .......................................................... 0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Function Table
[1]
Operating
Mode
Inputs
Outputs
CP
CE
D
O
Load "1"
l
h
H
Load "0"
l
l
L
Hold
X
h
H
X
X
No Change
No Change
Operating Range
Range
Range
Ambient
Temperature
V
CC
Commercial
All
40
C to +85
C
5V
5%
Military
[4]
All
55
C to +125
C
5V
10%
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.
[5]
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
=Min., I
OH
=32 mA
Com'l
2.0
V
V
CC
=Min., I
OH
=15 mA
Com'l
2.4
3.3
V
V
CC
=Min., I
OH
=12 mA
Mil
2.4
3.3
V
V
OL
Output LOW Voltage
V
CC
=Min., I
OL
=64 mA
Com'l
0.3
0.55
V
V
CC
=Min., I
OL
=32 mA
Mil
0.3
0.55
V
V
IH
Input HIGH Voltage
2.0
V
V
IL
Input LOW Voltage
0.8
V
V
H
Hysteresis
[6]
All inputs
0.2
V
V
IK
Input Clamp Diode Voltage
V
CC
=Min., I
IN
=18 mA
0.7
1.2
V
I
I
Input HIGH Current
V
CC
=Max., V
IN
=V
CC
5
A
I
IH
Input HIGH Current
V
CC
=Max., V
IN
=2.7V
1
A
I
IL
Input LOW Current
V
CC
=Max., V
IN
=0.5V
1
A
I
OS
Output Short Circuit Current
[7]
V
CC
=Max., V
OUT
=0.0V
60
120
225
mA
I
OFF
Power-Off Disable
V
CC
=0V., V
OUT
=4.5V
1
A
Notes:
1.
H
= HIGH Voltage Level
h
= HIGH Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition
L
= LOW Voltage Level
l
= LOW Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition
X
= Don't Care
Z
= HIGH Impedance
= LOW-to-HIGH clock transition
2.
Unless otherwise noted, these limits are over the operating free-air temperature range.
3.
Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
4.
T
A
is the "instant on" case temperature.
5.
Typical values are at V
CC
=5.0V, T
A
=+25C ambient.
6.
This parameter is specified but not tested.
7.
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I
OS
tests should be performed last.
CY54/74FCT377T
3
Capacitance
[2]
Parameter
Description
Typ.
[5]
Max.
Unit
C
IN
Input Capacitance
5
10
pF
C
OUT
Output Capacitance
9
12
pF
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.
[5]
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
=Max., V
IN
0.2V, V
IN
V
CC
0.2V
0.1
0.2
mA
I
CC
Quiescent Power Supply Current
(TTL inputs HIGH)
V
CC
=Max., V
IN
=3.4V, f
1
=0, Outputs Open
[8]
0.5
2.0
mA
I
CCD
Dynamic Power Supply Current
[9]
V
CC
=Max., One Bit Toggling,
50% Duty Cycle, Outputs Open,
CE=GND, V
IN
0.2V or V
IN
V
CC
0.2V
0.06
0.12
mA/MHz
I
C
Total Power Supply Current
[10]
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f
1
=5 MHz,
CE=GND, V
IN
0.2V or V
IN
V
CC
0.2V
0.7
1.4
mA
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f
1
=5 MHz, CE=GND,
V
IN
=3.4V or V
IN
=GND
1.2
3.4
mA
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f
1
=2.5 MHz,
CE=GND, V
IN
0.2V or V
IN
V
CC
0.2V
1.6
3.2
[11]
mA
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f
1
=2.5 MHz,
CE=GND, V
IN
=3.4V or V
IN
=GND
3.9
12.2
[11]
mA
Notes:
8.
Per TTL driven input (V
IN
=3.4V); all other inputs at V
CC
or GND.
9.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
=
I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
=
I
CC
+
I
CC
D
H
N
T
+I
CCD
(f
0
/2 + f
1
N
1
)
I
CC
=
Quiescent Current with CMOS input levels
I
CC
=
Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
D
H
=
Duty Cycle for TTL inputs HIGH
N
T
=
Number of TTL inputs at D
H
I
CCD
=
Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
=
Clock frequency for registered devices, otherwise zero
f
1
=
Input signal frequency
N
1
=
Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the I
CC
formula. These limits are specified but not tested.
CY54/74FCT377T
4
Switching Characteristics
Over the Operating Range
[12, 13]
Parameter
Description
FCT377T
FCT377AT
Unit
Fig.
No.
[14]
Commercial
Military
Commercial
Min.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay Clock to
Output
2.0
13.0
2.0
8.3
2.0
7.2
ns
1, 5
t
S
Set-Up Time HIGH or LOW
Data to CP
2.0
2.0
2.0
ns
4
t
H
Hold Time HIGH or LOW
Data to CP
1.5
1.5
1.5
ns
4
t
W
Set-Up Time HIGH or LOW
CE to CP
3.5
3.5
3.5
ns
4
t
W
Set-Up Time HIGH or LOW
CE to CP
1.5
1.5
1.5
ns
4
t
W
Clock Pulse Width
[15]
HIGH or
LOW
6.0
7.0
6.0
ns
6
Parameter
Description
FCT377CT
Unit
Fig.
No.
[14]
Military
Commercial
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay Clock to Output
2.0
5.5
2.0
5.2
ns
1, 5
t
S
Set-Up Time, HIGH or LOW, Data to CP
2.0
2.0
ns
4
t
H
Hold Time, HIGH or LOW, Data to CP
1.5
1.5
ns
4
t
W
Set-Up Time, HIGH or LOW, CE to CP
3.5
3.5
ns
4
t
W
Set-Up Time HIGH or LOW, CE to CP
1.5
1.5
ns
4
t
W
Clock Pulse Width
[15]
HIGH or LOW
7.0
6.0
ns
6
Notes:
12. AC Characteristics specified with C
L
=50 pF as shown in Figure 1 of the "Parameter Measurement Information" in the General Information section.
13. Minimum limits are specified but not tested on Propagation Delays.
14. See "Parameter Measurement Information" in the General Information section.
15. With one data channel toggling, t
W
(L)=t
W
(H)=4.0 ns and t
r
=t
f
=1.0 ns.
Ordering Information--FCT377T
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
5.2
CY74FCT377CTQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT377CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
5.5
CY54FCT377CTLMB
L61
20-Pin Square Leadless Chip Carrier
Military
7.2
CY74FCT377ATQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT377ATSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
8.3
CY54FCT377TLMB
L61
20-Pin Square Leadless Chip Carrier
Military
13.0
CY74FCT377TQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
Document #: 38-00279-B
CY54/74FCT377T
5
Package Diagrams
20-Pin Square Leadless Chip Carrier L61
MILSTD1835 C2A
20-Lead Quarter Size Outline Q5
PDF 
ZIP