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Электронный компонент: GD75323

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GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Single Chip With Easy Interface Between
UART and Serial-Port Connector of an
External Modem or Other Computer
Peripheral
D
Five Drivers and Three Receivers Meet or
Exceed the Requirements of ANSI Standard
TIA/EIA-232-F and ITU Recommendation
V.28 Standards
D
Supports Data Rates up to 120 kbit/s
D
Complement to the GD75232
D
Provides Pin-to-Pin Replacement for the
Goldstar GD75323
D
Pin-Out Compatible With SN75196
D
Functional Replacement for the MC145405
description
The GD75323 combines five drivers and three receivers from the trade-standard SN75188 and SN75189
bipolar quadruple drivers and receivers, respectively. The flow-through design of the GD75323 decreases the
part count, reduces the board space required, and allows easy interconnection of the UART and serial-port
connector. The all-bipolar circuits and processing of the GD75323 provide a rugged, low-cost solution for this
function.
The GD75323 complies with the requirements of the ANSI TIA/EIA-232-F and ITU (formerly CCITT) V.28
standards. These standards are for data interchange between a host computer and a peripheral at signal rates
up to 20 kbit/s. The switching speeds of the GD75323 are fast enough to support rates up to 120 kbit/s with lower
capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be assured unless the
designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling
rates up to 120 kbit/s, use of ANSI Standard TIA/EIA-423-B and TIA/EIA-422-B and ITU Recommendations V.10
and V.11 are recommended.
The GD75323 is characterized for operation over a temperature range of 0
C to 70
C.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
1DA
2DA
3DA
1RY
2RY
4DA
3RY
5DA
GND
V
DD
1DY
2DY
3DY
1RA
2RA
4DY
3RA
5DY
V
SS
DW OR N PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1999, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
9
8
7
6
5
4
3
2
5DY
3RA
4DY
2RA
1RA
3DY
2DY
1DY
5DA
3RY
4DA
2RY
1RY
3DA
2DA
1DA
12
13
14
15
16
17
18
19
logic diagram (positive logic)
1DY
1DA
2DY
2DA
3DY
3DA
1RA
1RY
2RA
2RY
4DY
4DA
3RA
3RY
5DY
5DA
2
3
4
5
6
7
8
9
19
18
12
13
14
15
16
17
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
schematic (each driver)
DYx Output
320
68.5
3.3 k
10.4 k
To Other Drivers
VSS
To Other
Drivers
GND
4.2 k
Input DAx
VDD
75.8
9.4 k
11.6 k
To Other Drivers
Resistor values shown are nominal.
schematic (each receiver)
Input RAx
10 k
3.8 k
9 k
5 k
1.66 k
GND
RYx Output
VCC
To Other Receivers
Resistor values shown are nominal.
2 k
To Other Receivers
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
(see Note 1)
10 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, V
DD
(see Note 1)
15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, V
SS
(see Note 1)
15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
:
Driver
15 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver
30 V to 30 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(Driver)
15 V to 15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, I
OL
(Receiver)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DW package
97
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. All voltages are with respect to the network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
MIN
NOM
MAX
UNIT
VDD
7.5
9
13.5
Supply voltage
VSS
7.5
9
13.5
V
VCC
4.5
5
5.5
High-level input voltage, VIH
Driver
1.9
V
Low-level input voltage, VIL
Driver
0.8
V
High level output current IOH
Driver
6
mA
High-level output current, IOH
Receiver
0.5
mA
High level output current IOL
Driver
6
mA
High-level output current, IOL
Receiver
16
mA
Operating free-air temperature,TA
0
70
C
supply currents over operating free-air temperature range
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
All inputs at 1 9 V
No load
VDD = 9 V,
VSS = 9 V
25
mA
IDD
Supply current from VDD
All inputs at 1.9 V,
No load
VDD = 12 V,
VSS = 12 V
32
mA
IDD
Supply current from VDD
All inputs at 0 8 V
No load
VDD = 9 V,
VSS = 9 V
7.5
mA
All inputs at 0.8 V,
No load
VDD = 12 V,
VSS = 12 V
9.5
mA
All inputs at 1 9 V
No load
VDD = 9 V,
VSS = 9 V
25
mA
ISS
Supply current from VSS
All inputs at 1.9 V,
No load
VDD = 12 V,
VSS = 12 V
32
mA
ISS
Supply current from VSS
All inputs at 0 8 V
No load
VDD = 9 V,
VSS = 9 V
5.3
mA
All inputs at 0.8 V,
No load
VDD = 12 V,
VSS = 12 V
5.3
mA
ICC
Supply current from VCC
VCC= 5 V,
All inputs at 5 V,
No load
20
mA
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over operating free-air temperature range, V
DD
= 9 V, V
SS
= 9 V,
V
CC
= 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
VIL = 0.8 V,
RL = 3 k
,
See Figure 1
6
7.5
V
VOL
Low-level output voltage (see Note 3)
VIH = 1.9 V,
RL = 3 k
,
See Figure 1
7.5
6
V
IIH
High-level input current
VI = 5 V,
See Figure 2
10
A
IIL
Low-level input current
VI = 0,
See Figure 2
1.6
mA
IOS(H)
High-level short-circuit output current
(see Note 4)
VIL = 0.8 V,
VO = 0,
See Figure 1
4.5
9
19.5
mA
IOS(L)
Low-level short-circuit output current
VIH = 2 V,
VO = 0,
See Figure 1
4.5
9
19
mA
ro
Output resistance (see Note 5)
VCC = VDD = VSS = 0,
VO = 2 V to 2 V
300
NOTES:
3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only, e.g., if 10 V is maximum, the typical value is a more negative voltage.
4. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.
5. Test conditions are those specified by TIA/EIA-232-F and as listed above.
switching characteristics, V
DD
= 12 V, V
SS
= 12 V, V
CC
= 5 V
10%, T
A
= 25
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
Propagation delay time, low- to high-level output
RL = 3 k
to 7 k
,
CL = 15 pF,
315
500
ns
tPHL
Propagation delay time, high- to low-level output
L
,
See Figure 3
L
,
75
175
ns
tTLH
Transition time low to high level output
RL = 3 k
to 7 k
,
See Figure 3
CL = 15 pF,
60
100
ns
tTLH
Transition time, low- to high-level output
RL = 3 k
to 7 k
,
See Figure 3 and Note 6
CL = 2500 pF,
1.7
2.5
s
tTHL
Transition time, high- to low-level output (see
RL = 3 k
to 7 k
,
See Figure 3
CL = 15 pF,
40
75
ns
tTHL
g
(
Note 5)
RL = 3 k
to 7 k
,
See Figure 3 and Note 7
CL = 2500 pF,
1.5
2.5
s
NOTES:
6. Measured between 3-V and 3-V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs are tied either high
or low.
7. Measured between 3-V and 3-V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs are tied either high
or low.
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT
Positive going input threshold voltage
See Figure 5
TA = 25
C
1.75
1.9
2.3
VIT+
Positive-going input threshold voltage
See Figure 5
TA = 0
C to 70
C
1.55
2.3
V
VIT
Negative-going input threshold voltage
See Figure 5
0.75
0.97
1.25
V
Vhys
Input hysteresis voltage (VIT+ VIT)
See Figure 5
0.5
VOH
High level output voltage
IOH = 0 5 mA
VIH = 0.75 V
2.6
4
5
V
VOH
High-level output voltage
IOH = 0.5 mA
Inputs open
2.6
V
VOL
Low-level output voltage
IOL = 10 mA,
VI = 3 V
0.2
0.45
V
IIH
High level input current
VI = 25 V,
See Figure 5
3.6
8.3
mA
IIH
High-level input current
VI = 3 V,
See Figure 5
0.43
mA
IIL
Low level input current
VI = 25 V,
See Figure 5
3.6
8.3
mA
IIL
Low-level input current
VI = 3 V,
See Figure 5
0.43
mA
IOS
Short-circuit output current
See Figure 4
3.4
12
mA
All typical values are at TA = 25
C, VCC = 5 V, VDD = 9 V, and VSS = 9 V.
switching characteristics, V
CC
= 5 V, V
DD
= 12 V, V
SS
= 12 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
Propagation delay time, low- to high-level output
107
500
ns
tPHL
Propagation delay time, high- to low-level output
CL = 50 pF,
RL = 5 k
,
42
150
ns
tTLH
Transition time, low- to high-level output
L
See Figure 6
L
175
525
ns
tTHL
Transition time, high- to low-level output
16
60
ns
PARAMETER MEASUREMENT INFORMATION
Figure 1. Driver Test Circuit
for V
OH
, V
OL
, I
OS(H)
, and I
OS(L
IOS(L)
IOS(H)
VSS
VDD
VCC
VI
VO
VDD or GND
VSS or GND
RL = 3 k
Figure 2. Driver Test Circuit for I
IH
and I
IL
IIL
IIH
VSS
VDD
VCC
VI
VI
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Pulse
Generator
See Note B
CL
(see Note A)
RL
3 V
0 V
1.5 V
1.5 V
Input
t PHL
t PLH
90%
50%
10%
50%
10%
90%
t THL
t TLH
VOH
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Input
Output
VSS
VCC
VDD
VO
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tw = 25
s, PRR = 20 kHz, ZO = 50
, tr = tf < 50 ns.
Figure 3. Driver Test Circuit and Voltage Waveforms
Figure 4. Receiver Test Circuit for I
OS
VI
VDD
VCC
VSS
IOS
Figure 5. Receiver Test Circuit
for V
IT
, V
OH
, and V
OL
VIT, VI
VDD
VCC
VSS
IOL
VOH
IOH
VOL
VSS
Pulse
Generator
See Note B
CL
(see Note A)
RL
5 V
5 V
50%
50%
Input
t PHL
t PLH
90%
50%
10%
50%
10%
90%
t THL
t TLH
VOH
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Input
VDD
VCC
Output
VO
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tw = 25
s, PRR = 20 kHz, ZO = 50
, tr = tf < 50 ns.
Figure 6. Receiver Propagation and Transition Times
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
DRIVER SECTION
Figure 7
VO Output V
oltage V
VOLTAGE-TRANSFER CHARACTERISTICS
VDD = 6 V, VSS = 6 V
9
6
3
0
3
6
9
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
12
2
12
VI Input Voltage V
0
VDD = 12 V, VSS = 12 V
VDD = 9 V, VSS = 9 V
RL = 3 k
TA = 25
C
V
O
Figure 8
IO Output Current mA
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
VOH(VI = 0.8 V)
VSS = 9 V
16
12
8
4
0
4
8
12
16
12
8
4
0
4
8
12
20
16
20
VO Output Voltage V
16
VOL(VI = 1.9 V)
I O
3-k
VDD = 9 V
TA = 25
C
Load Line
Figure 9
IOS Short-Circuit Output Current mA
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
VO = 0
VSS = 9 V
70
60
50
40
30
20
10
9
6
3
0
3
6
9
12
12
TA Free-Air Temperature
C
0
VDD = 9 V
I OS
IOS(H) (VI = 0.8 V)
IOS(L) (VI = 1.9 V)
Figure 10
SR Slew Rate V/
SLEW RATE
vs
LOAD CAPACITANCE
TA = 25
C
RL = 3 k
VSS = 9 V
VDD = 9 V
100
10
1000
100
1
10000
1000
CL Load Capacitance pF
s
10
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
RECEIVER SECTION
Figure 11
Input Threshold V
oltage V
INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
2.2
2
1.8
1.6
1.4
1.2
0.8
0.6
0.4
2.4
TA Free-Air Temperature
C
VIT
VIT +
70
60
50
40
30
20
10
0
V
IT
Figure 12
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
9
8
7
6
5
4
3
0
10
2
VCC Supply Voltage V
2
VIT
VIT+
Input Threshold V
oltage V
V
IT
Figure 13
Amplitude V
NOISE REJECTION
CC = 300 pF
VCC = 5 V
TA = 25
C
See Note A
10
tw Pulse Duration ns
6
0
1
2
3
4
5
40
100
400
1000
4000
CC = 500 pF
CC = 12 pF
CC = 100 pF
NOTE
A: This figure shows the maximum amplitude of a
positive-going pulse that, starting from 0 V, does not
cause a change of the output level.
10000
Figure 14
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
RL
3 k
(from each output to GND)
14
12
10
8
6
4
2
70
60
50
40
30
20
10
0
16
TA Free-Air Temperature
C
0
Maximum Supply V
oltage V
DD
V
GD75323
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS213A JANUARY 1996 REVISED JUNE 1999
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
Diodes placed in series with the V
DD
and V
SS
leads protect the GD75323 in the fault condition in which the device
outputs are shorted to V
DD
or V
SS
, and the power supplies are at low and provide low-impedance paths to
ground (see Figure 15).
VDD
VSS
15 V
Output
VDD
VSS
GD75323
GD75323
Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA / EIA-232-F
10
9
8
7
6
5
4
3
2
1
GND
5DA
3RY
4DA
2RY
1RY
3DA
2DA
1DA
VCC
VSS
5DY
3RA
4DY
2RA
1RA
3DY
2DY
1DY
VDD
11
12
13
14
15
16
17
18
19
20
43
37
40
13
36
11
41
42
RI
DTR
CTS
SO
RTS
SI
DSR
DCD
RI
DTR
CTS
TX
RTS
RX
DSR
DCD
GD75323
5 V
TL16C450
ACE
1
5
6
9
12 V
12 V
TIA/EIA-232-F
DB9S
Connector
C2
C5
See Figure 10 to select the correct values for the loading capacitors (C1, C2, C3, C4, and C5), which may be required to meet the RS-232
maximum slew-rate requirement of 30 V/
s. The value of the loading capacitors required depends upon the line length and desired slew rate,
but is typically 330 pF.
NOTE C: To use the receivers only, VDD and VSS both must be powered or tied to ground.
C4
C3
C1
Figure 16. Typical Connection
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL
APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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In order to minimize risks associated with the customer's applications, adequate design and operating
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TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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Copyright
1999, Texas Instruments Incorporated