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Электронный компонент: SN65HVD1176D

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SN65HVD1176
SN75HVD1176
SLLS563C - JULY 2003 - REVISED APRIL 2005
PROFIBUS RS 485 TRANSCEIVERS
FEATURES
D
Optimized for PROFIBUS Networks
- Meets the Requirements of EN 50170
- Signaling Rates Up to 40 Mbps
- Differential Output Exceeds 2.1 V
(54
Load)
- Low Bus Capacitance: 10 pF (Max)
D
Meets the Requirements of TIA/EIA-485-A
D
ESD Protection Exceeds
10 kV HBM
D
Failsafe Receiver for Bus Open, Short, Idle
D
Up to 160 Transceivers on a Bus
D
Low Skew During Output Transitions and
Driver Enabling / Disabling
D
Common-Mode Rejection Up to 50 MHz
D
Short-Circuit Current Limit
D
Hot Swap Capable
D
Thermal Shutdown Protection
DESCRIPTION
APPLICATIONS
D
Process Automation
-
Chemical Production
-
Brewing and Distillation
-
Paper Mills
D
Factory Automation
-
Automobile Production
-
Rolling, Pressing, Stamping Machines
-
Networked Sensors
D
General RS-485 Networks
-
Motor/Motion Control
-
HVAC and Building Automation Networks
-
Networked Security Stations
These devices are half-duplex differential transceivers, with characteristics optimized for use in PROFIBUS (EN 50170)
applications. The driver output differential voltage exceeds the Profibus requirements of 2.1 V with a 54-
load. A signaling
rate of up to 40 Mbps allows technology growth to high data transfer speeds. The low bus capacitance provides low signal
distortion.
The SN65HVD1176 and SN75HVD1176 meet or exceed the requirements of ANSI standard TIA/EIA-485-A (RS-485) for
differential data transmission across twisted-pair networks. The driver outputs and receiver inputs are tied together to form
a half-duplex bus port, with one-fifth unit load, allowing up to 160 nodes on a single bus. The receiver output stays at logic
high when the bus lines are shorted, left open, or when no driver is active. The driver outputs are in high impedance when
the supply voltage is below 2.5 V to prevent bus disturbance during power cycling or during live insertion to the bus.
An internal current limit protects the transceiver bus pins in short-circuit fault conditions by limiting the output current to a
constant value. Thermal shutdown circuitry protects the device against damage due to excessive power dissipation caused
by faulty loading and drive conditions.
The SN75HVD1176 is characterized for operation at temperatures from 0
C to 70
C. The SN65HVD1176 is characterized
for operation at temperatures from -40
C to 85
C.
1
2
3
4
8
7
6
5
R
RE
DE
D
V
CC
B
A
GND
D PACKAGE
(TOP VIEW)
A
B
D
DE
RE
R
LOGIC DIAGRAM (POSITIVE LOGIC)
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright
2003, Texas Instruments Incorporated
SN65HVD1176
SN75HVD1176
SLLS563C - JULY 2003 - REVISED APRIL 2005
www.ti.com
2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
TA
PACKAGED DEVICES(1)
MARKED AS
0
C to 70
C
SN75HVD1176D
VN1176
-40
C to 85
C
SN65HVD1176D
VP1176
(1) The D package is available taped and reeled. Add an R suffix to the device type (i.e., SN65HVD1176DR).
ABSOLUTE MAXIMUM RATINGS
over operating junction temperature range unless otherwise noted(1)
SN65HVD1176, SN75HVD1176
Supply voltage(2), VCC
-0.5 V to 7 V
Voltage at any bus I/O terminal
-9 V to 14 V
Voltage input, transient pulse, A and B, (through 100
, see Figure 14)
-40 V to 40 V
Voltage input at any D, DE or RE terminal
-0.5 V to 7 V
Receiver output current, IO
-10 mA to 10 mA
Electrostatic discharge
Human Body Model, (HBM)(3)
All pins
4 kV
Electrostatic discharge
Human Body Model, (HBM)(3)
Bus terminals and GND
10 kV
Junction temperature, TJ
150
C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with JEDEC standard 22. test method A114-A.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
Supply voltage, VCC
4.75
5
5.25
Voltage at either bus I/O terminal
A, B
-7
12
High-level input voltage, VIH
D, DE, RE
2
VCC
V
Low-level input voltage, VIL
D, DE, RE
0
0.8
V
Differential input voltage, VID
A with respect to B
-12
12
Output current
Driver
-70
70
mA
Output current
Receiver
-8
8
mA
Junction temperature, TJ (1)
SN65HVD1176
-40
130
Junction temperature, TJ (1)
SN75HVD1176
0
130
Differential load resistance, RL
54
Signaling rate, 1/tU1
40
Mbps
(1) See the Thermal Characteristics table for more information on maintenance of this requirement.
SN65HVD1176
SN75HVD1176
SLLS563C - JULY 2003 - REVISED APRIL 2005
www.ti.com
3
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX
UNIT
VO
Open-circuit output voltage
A or B,
No load
0
VCC
V
RL = 54
,
See Figure 1
2.1
2.9
VOD(SS)
Steady-state differential output voltage magnitude
With common-mode loading,
(VTEST from -7 V to 12 V)
See Figure 2
2.1
2.7
V
|
VOD(SS)|
Change in steady-state differential output voltage
between logic states
See Figure 1 and Figure 6
-0.2
0
0.2
V
VOC(SS)
Steady-state common-mode output voltage
2
2.5
3
V
VOC(SS)
Change in steady-state common-mode output
voltage
See Figure 5
-0.2
0
0.2
V
VOC(PP)
Peak-to-peak common-mode output voltage
0.5
V
VOD(RING)
Differential output voltage over and under shoot
RL = 54
, CL = 50 pF, See Figure 6
10% VOD(PP)
II
Input current
D, DE
-50
50
A
IO(OFF)
Output current with power off
VCC < = 2.5 V
See receiver line input
IOZ
High impedance state output current
DE at 0 V
See receiver line input
current
IOS(P)
Peak short-circuit output current
VOS = -7 V to 12 V
-250
250
mA
IOS(SS)
Steady-state short-circuit output current
DE at VCC,
See Figure 8
VOS > 4 V,
Output driving low
60
90
135
mA
IOS(SS)
Steady-state short-circuit output current
See Figure 8
VOS < 1 V,
Output driving high
-135
-90
-60
mA
COD
Differential output capacitance
See receiver CI
(1) All typical values are at VCC = 5 V and 25
C.
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
Propagation delay time low-level-to-high-level output
4
7
10
ns
tPHL
Propagation delay time high-level-to-low-level output
RL = 54
, CL = 50 pF,
4
7
10
ns
tsk(p)
Pulse skew | tPLH tPHL |
RL = 54
, CL = 50 pF,
See Figure 3
0
2
ns
tr
Differential output rise time
See Figure 3
2
3
7.5
ns
tf
Differential output fall time
2
3
7.5
ns
tt(MLH), tt(MHL)
Output transition skew
See Figure 4
0.2
1
ns
tp(AZH), tp(BZH)
tp(AZL), tp(BZL)
Propagation delay time, high-impedance-to-active output
10
20
ns
tp(AHZ), tp(BHZ)
tp(ALZ), tp(BLZ)
Propagation delay time, active-to- high-impedance output
RE at 0 V
10
20
ns
|tp(AZL) - tp(BZH)|
|tp(AZH) - tp(BZL)|
Enable skew time
RL = 110
,
CL = 50 pF,
See Figure 7a
RE at 0 V
0.55
1.5
ns
|tp(ALZ) - tp(BHZ)|
|tp(AHZ) - tp(BLZ)|
Disable skew time
L
See Figure 7a
and 7b
2.5
ns
tp(AZH), tp(BZH)
tp(AZL), tp(BZL)
Propagation delay time, high-impedance-to-active output
(from sleep mode)
RE at 5 V
1
4
s
tp(AHZ), tp(BHZ)
tp(ALZ), tp(BLZ)
Propagation delay time, active-output-to high-impedance
(to sleep mode)
RE at 5 V
30
50
ns
t(CFB)
Time from application of short-circuit to current foldback
See Figure 8
0.5
s
t(TSD)
Time from application of short-circuit to thermal shutdown
TA = 25
C, See Figure 8
100
s
(1) All typical values are at VCC = 5 V and 25
C.
SN65HVD1176
SN75HVD1176
SLLS563C - JULY 2003 - REVISED APRIL 2005
www.ti.com
4
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX
UNIT
VIT(+)
Positive-going differential input voltage threshold
See Figure 9
VO = 2.4 V, IO = -8 mA
-80
-20
mV
VIT(-)
Negative-going differential input voltage threshold
See Figure 9
VO = 0.4 V, IO = 8 mA
-200
-120
mV
VHYS
Hysteresis voltage (VIT+ - VIT-)
40
mV
VOH
High-level output voltage
VID = 200 mV, IOH = -8 mA, See Figure 9
4
4.6
V
VOL
Low-level output voltage
VID = -200 mV, IOL = 8 mA, See Figure 9
0.2
0.4
V
IA, IB
VI = - 7 V to 12 V,
VCC = 4.75 V to 5.25 V
IA(OFF),
Bus pin input current
VI = - 7 V to 12 V,
Other input = 0 V
VCC = 0V
-160
200
A
IA(OFF),
IB(OFF)
Bus pin input current
Other input = 0 V
VCC = 0V
-160
200
A
II
Receiver enable input current
RE
-50
50
A
IOZ
High-impedance -state output current
RE = VCC
-1
1
A
RI
Input resistance
60
k
CID
Differential input capacitance
Test input signal is a 1.5 MHz sine wave
with amplitude 1 Vpp, capacitance
measured across A and B
7
10
pF
CMR
Common mode rejection
See Figure 11
4
V
(1) All typical values are at 25
C.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions
PARAMETER
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
Propagation delay time, low-to-high level output
20
25
ns
tPHL
Propagation delay time, high-to-low level output
20
25
ns
tsk(p)
Pulse skew | tPLH tPHL |
See Figure 10
1
2
ns
tr
Receiver output voltage rise time
See Figure 10
2
4
ns
tf
Receiver output voltage fall time
2
4
ns
tPZH
Propagation delay time, high-impedance-to-high-level output
DE at VCC,
20
ns
tPHZ
Propagation delay time, high-level-to-high-impedance output
DE at VCC,
See Figure 13
20
ns
tPZL
Propagation delay time, high-impedance-to-low-level output
DE at VCC,
20
ns
tPLZ
Propagation delay time, low-level-to-high-impedance output
DE at VCC,
See Figure 14
20
ns
tPZH
Propagation delay time, high-impedance-to-high-level output (standby to active)
DE at 0 V,
1
4
s
tPHZ
Propagation delay time, high-level-to-high-impedance output (active to standby)
DE at 0 V,
See Figure 12
13
20
ns
tPZL
Propagation delay time, high-impedance-to-low-level output (standby to active)
DE at 0 V
See Figure 12
2
4
s
tPLZ
Propagation delay time, low-level-to-high-impedance output (active to standby)
DE at 0 V
See Figure 12
13
20
ns
SUPPLY CURRENT
over recommended operating conditions
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Driver and receiver, RE at 0 V, DE at VCC, All other inputs open, no load
4
6
mA
ICC
Supply current
Driver only, RE at VCC, DE at VCC, All other inputs open, no load
3.8
6
mA
ICC
Supply current
Receiver only, RE at 0 V, DE at 0 V, All other inputs open, no load
3.6
6
mA
Standby only, RE at VCC, DE at 0 V, All other inputs open
0.2
5
A
SN65HVD1176
SN75HVD1176
SLLS563C - JULY 2003 - REVISED APRIL 2005
www.ti.com
5
PARAMETER MEASUREMENT INFORMATION
NOTES:
Test load capacitance includes probe and jig capacitance (unless otherwise specified).
Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle, Zo = 50
(unless otherwise specified)
II
IO
IO
VOD
50 pF
27
27
VOC
0 V or 3 V
A
B
D
Figure 1. Driver Test Circuit, V
OD
and V
OC
Without Common-Mode Loading
VOD
60
VTEST
0 V or 3 V
375
375
VTEST = -7 V to 12 V
A
B
D
Figure 2. Driver Test Circuit, V
OD
With Common-Mode Loading
VOD
50
RL = 54
CL = 50 pF
Signal
Generator
3 V
0 V
VOD(H)
VOD(L)
90%
10%
tr
tf
INPUT
OUTPUT
Figure 3. Driver Switching Test Circuit and Rise/Fall Time Measurement
tPLH
tPHL
1.5 V
1.5 V
50%
50%
50%
50%
tt(MLH)
tt(MHL)
D
A,B
A
B
Figure 4. Driver Switching Waveforms for Propagation Delay and Output Midpoint Time Measurements