SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Bidirectional Transceiver
D
Meet or Exceed the Requirements of ANSI
Standard RS-485 and
ISO 8482:1987(E)
D
High-Speed Low-Power LinBiCMOS
TM
Circuitry
D
Designed for High-Speed Operation in Both
Serial and Parallel Applications
D
Low Skew
D
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
D
Very Low Disabled Supply-Current
Requirements . . . 200
A Maximum
D
Wide Positive and Negative Input/Output
Bus Voltage Ranges
D
Driver Output Capacity . . .
60 mA
D
Thermal-Shutdown Protection
D
Driver Positive-and Negative-Current
Limiting
D
Open-Circuit Fail-Safe Receiver Design
D
Receiver Input Sensitivity . . .
200 mV Max
D
Receiver Input Hysteresis . . . 50 mV Typ
D
Operate From a Single 5-V Supply
D
Glitch-Free Power-Up and Power-Down
Protection
D
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
description
The SN55LBC176, SN65LBC176,
SN65LBC176Q, and SN75LBC176 differential
bus transceivers are monolithic, integrated
circuits designed for bidirectional data communi-
cation on multipoint bus-transmission lines. They
are designed for balanced transmission lines and
meet ANSI Standard RS-485 and ISO
8482:1987(E).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
R
RE
DE
D
V
CC
B
A
GND
D, JG, OR P PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
NC
B
NC
A
NC
NC
RE
NC
DE
NC
FK PACKAGE
(TOP VIEW)
NC
R
NC
GND
NC
V
NC
NC
D
NC
NC No internal connection
CC
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2000, Texas Instruments Incorporated
LinBiCMOS and LinASIC are trademarks of Texas Instruments Incorporated.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
INPUT
D
H
L
X
ENABLE
DE
H
H
L
OUTPUTS
A B
H L
L H
Z Z
DRIVER
DIFFERENTIAL INPUTS
A B
VID
0.2 V
0.2 V < VID < 0.2 V
VID
0.2 V
X
Open
ENABLE
RE
L
L
L
H
L
OUTPUT
R
H
?
L
Z
H
RECEIVER
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
Function Tables
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 combine a 3-state, differential line driver
and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and
receiver have active-high and active-low enables, respectively, which can externally connect together to
function as a direction control. The driver differential outputs and the receiver differential inputs connect
internally to form a differential input /output (I/O) bus port that is designed to offer minimum loading to the bus
whenever the driver is disabled or V
CC
= 0. This port features wide positive and negative common-mode voltage
ranges, making the device suitable for party-line applications. Very low device supply current can be achieved
by disabling the driver and the receiver. Both the driver and receiver are available as cells in the Texas
Instruments LinASIC
TM
Library.
These transceivers are suitable for ANSI Standard RS-485 and ISO 8482:1987 (E) applications to the extent
that they are specified in the operating conditions and characteristics section of this data sheet. Certain limits
contained in the ANSI Standard RS-485 and ISO 8482:1987 (E) are not met or cannot be tested over the entire
military temperature range.
The SN55LBC176 is characterized for operation from 55
C to 125
C. The SN65LBC176 is characterized for
operation from 40
C to 85
C, and the SN65LBC176Q is characterized for operation from 40
C to 125
C.
The SN75LBC176 is characterized for operation from 0
C to 70
C.
logic symbol
logic diagram (positive logic)
2
EN1
B
A
1
4
2
R
D
RE
7
6
D
RE
R
7
6
4
1
2
B
A
Bus
3
EN2
1
1
DE
3
DE
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
schematics of inputs and outputs
Input
VCC
EQUIVALENT OF EACH INPUT
TYPICAL OF RECEIVER OUTPUT
Output
VCC
VCC
100 k
NOM
A Port Only
18 k
NOM
3 k
NOM
A or B
100 k
NOM
B Port Only
1.1 k
NOM
TYPICAL OF A AND B I/O PORTS
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
(see Note 1)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at any bus terminal
10 V to 15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
(D, DE, R, or RE)
0.3 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation
See Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN55LBC176 55
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN65LBC176 40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN65LBC176Q 40
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN75LBC176 0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
C
TA = 70
C
POWER RATING
TA = 85
C
POWER RATING
TA = 110
C
POWER RATING
D
725 mW
5.8 mW/
C
464 mW
377 mW
--
FK
1375 mW
11.0 mW/
C
880 mW
715 mW
440 mW
JG
1050 mW
8.4 mW/
C
672 mW
546 mW
210 mW
P
1000 mW
8.0 mW/
C
640 mW
520 mW
--
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VCC
4.75
5
5.25
V
Voltage at any bus terminal (separately or common mode) VI or VIC
12
V
Voltage at any bus terminal (separately or common mode), VI or VIC
7
V
High-level input voltage, VIH
D, DE, and RE
2
V
Low-level input voltage, VIL
D, DE, and RE
0.8
V
Differential input voltage, VID (see Note 2)
12
V
High level output current IOH
Driver
60
mA
High-level output current, IOH
Receiver
400
A
Low level output current IOL
Driver
60
mA
Low-level output current, IOL
Receiver
8
mA
SN55LBC176
55
125
Operating free air temperature TA
SN65LBC176
40
85
C
Operating free-air temperature, TA
SN65LBC176Q
40
125
C
SN75LBC176
0
70
NOTE 2: Differential input /output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VIK
Input clamp voltage
II = 18 mA
1.5
V
VO
Output voltage
IO = 0
0
6
V
| VOD1 |
Differential output voltage
IO = 0
1.5
6
V
55LBC176,
| V
|
Differential output voltage
RL = 54
,
See Figure 1,
55LBC176,
65LBC176,
1.1
V
| VOD2 |
Differential output voltage
RL 54
,
See Note 3
See Figure 1,
65LBC176Q
V
75LBC176
1.5
5
V
7 V t 12 V
S
Fi
2
55LCB176,
65LCB176
1 1
VOD3
Differential output voltage
Vtest = 7 V to 12 V,
See Note 3
See Figure 2,
65LCB176,
65LBC176Q
1.1
V
75LBC176
1.5
5
| VOD |
Change in magnitude of differential
output voltage
0.2
V
VOC
Common mode output voltage
RL = 54
or 100
See Figure 1
3
V
VOC
Common-mode output voltage
RL = 54
or 100
,
See Figure 1
1
V
| VOC |
Change in magnitude of
common-mode output voltage
0.2
V
IO
Output current
Output disabled,
VO = 12 V
1
mA
IO
Output current
,
See Note 4
VO = 7 V
0.8
mA
IIH
High-level input current
VI = 2.4 V
100
A
IIL
Low-level input current
VI = 0.4 V
100
A
VO = 7 V
250
IOS
Short circuit output current
VO = 0
150
mA
IOS
Short-circuit output current
VO = VCC
250
mA
VO = 12 V
250
Receiver disabled
55LBC176,
65LBC176Q
1.75
ICC
Supply current
VI = 0 or VCC,
and driver enabled
65LBC176,
75LBC176
1.5
mA
ICC
Supply current
I
CC
No load
Receiver and driver
55LBC176,
65LBC176Q
0.25
mA
disabled
65LBC176,
75LBC176
0.2
| VOD | and
| VOC | are the changes in magnitude of VOD and VOC, respectively, that occur when the input changes from a high level to a
low level.
NOTES:
3. This device meets the ANSI Standard RS-485 VOD requirements above 0
C only.
4. This applies for both power on and off; refer to ANSI Standard RS-485 for exact conditions.
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER
TEST CONDITIONS
SN55LBC176
SN65LBC176Q
SN65LBC176
SN75LBC176
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
td(OD)
Differential output delay time
R
54
C
50 F
8
31
8
25
ns
tt(OD)
Differential output transition time
RL = 54
,
See Figure 3
CL = 50 pF,
12
12
ns
tsk(p)
Pulse skew ( | td(ODH) td(ODL) | )
See Figure 3
6
0
6
ns
tPZH
Output enable time to high level
RL = 110
,
See Figure 4
65
35
ns
tPZL
Output enable time to low level
RL = 110
,
See Figure 5
65
35
ns
tPHZ
Output disable time from high level
RL = 110
,
See Figure 4
105
60
ns
tPLZ
Output disable time from low level
RL = 110
,
See Figure 5
105
35
ns
All typical values are at VCC = 5 V, TA = 25
C.
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER
RS-485
VO
Voa, Vob
| VOD1 |
Vo
| VOD2 |
Vt (RL = 54
)
| VOD3 |
Vt (test termination
measurement 2)
| VOD |
| | Vt | | Vt | |
VOC
| Vos |
| VOC |
| Vos Vos |
IOS
None
IO
Iia, Iib
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT +
Positive-going input threshold
voltage
VO = 2.7 V,
IO = 0.4 mA
0.2
V
VIT
Negative-going input threshold
voltage
VO = 0.5 V,
IO = 8 mA
0.2
V
Vhys
Hysteresis voltage (VIT + VIT )
(see Figure 4)
50
mV
VIK
Enable-input clamp voltage
II = 18 mA
1.5
V
VOH
High level output voltage
VID = 200 mV,
IOH = 400
A,
2 7
V
VOH
High-level output voltage
ID
,
See Figure 6
OH
,
2.7
V
VOL
Low level output voltage
VID = 200 mV,
IOL = 8 mA,
0 45
V
VOL
Low-level output voltage
ID
,
See Figure 6
OL
,
0.45
V
IOZ
High-impedance-state output
current
VO = 0.4 V to 2.4 V
20
A
II
Line input current
Other input = 0 V,
VI = 12 V
1
mA
II
Line input current
,
See Note 5
VI = 7 V
0.8
mA
IIH
High-level enable-input current
VIH = 2.7 V
100
A
IIL
Low-level enable-input current
VIL = 0.4 V
100
A
rI
Input resistance
12
k
Receiver enabled
and driver disabled
3.9
mA
ICC
Supply current
VI = 0 or VCC,
No load
Receiver and
SN55LBC176,
SN65LBC176
0 25
CC
y
No load
Receiver and
driver disabled
SN65LBC176,
SN65LBC176Q
0.25
mA
SN75LBC176
0.2
All typical values are at VCC = 5 V, TA = 25
C.
The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage and threshold voltage levels only.
NOTE 5: This applies for both power on and power off. Refer to ANSI Standard RS-485 for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 15 pF
PARAMETER
TEST CONDITIONS
SN55LBC176
SN65LBC176Q
SN65LBC176
SN75LBC176
UNIT
MIN
MAX
MIN
TYP
MAX
tPLH
Propagation delay time, low- to high-level
single-ended output
V
1 5 V t 1 5 V
11
37
11
33
ns
tPHL
Propagation delay time, high- to low-level
single-ended output
VID = 1.5 V to 1.5 V,
See Figure 7
11
37
11
33
ns
tsk(p)
Pulse skew ( | td(ODH) td(ODL) | )
10
3
6
ns
tPZH
Output enable time to high level
See Figure 8
35
35
ns
tPZL
Output enable time to low level
See Figure 8
35
30
ns
tPHZ
Output disable time from high level
See Figure 8
35
35
ns
tPLZ
Output disable time from low level
See Figure 8
35
30
ns
All typical values are at VCC = 5 V, TA = 25
C.
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOC
2
RL
VOD2
Vtest
VOD3
60
375
375
2
RL
Figure 1. Driver V
OD
and V
OC
Figure 2. Driver V
OD3
VOLTAGE WAVEFORMS
50%
tt(OD)
td(ODL)
10%
tt(OD)
2.5 V
2.5 V
90%
50%
Output
td(ODH)
0 V
3 V
1.5 V
Input
TEST CIRCUIT
Output
CL = 50 pF
(see Note B)
RL = 54
50
3 V
Generator
(see Note A)
1.5 V
Figure 3. Driver Test Circuit and Voltage Waveforms
VOLTAGE WAVEFORMS
tPHZ
1.5 V
2.3 V
0.5 V
0 V
3 V
tPZH
Output
Input
1.5 V
S1
0 V or 3 V
Output
TEST CIRCUIT
50
VOH
Voff
0 V
RL = 110
Generator
(see Note A)
CL = 50 pF
(see Note B)
Figure 4. Driver Test Circuit and Voltage Waveforms
TEST CIRCUIT
Output
RL = 110
5 V
S1
50
3 V or 0 V
VOLTAGE WAVEFORMS
5 V
VOL
0.5 V
tPZL
3 V
0 V
tPLZ
2.3 V
1.5 V
Output
Input
CL = 50 pF
(see Note B)
Generator
(see Note A)
1.5 V
Figure 5. Driver Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
1 MHz, 50% duty cycle, tr
6 ns, tf
6 ns,
ZO = 50
.
B. CL includes probe and jig capacitance.
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
IOH
+ IOL
VOL
VID
VOH
Figure 6. Receiver V
OH
and V
OL
51
CL = 15 pF
(see Note B)
Output
1.5 V
0 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
1.5 V
3 V
0 V
Input
Output
1.3 V
VOH
VOL
tPHL
tPLH
Generator
(see Note A)
1.5 V
1.3 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
1 MHz, 50% duty cycle, tr
6 ns, tf
6 ns,
ZO = 50
.
B. CL includes probe and jig capacitance.
Figure 7. Receiver Test Circuit and Voltage Waveforms
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Input
3 V
tPZH
1.5 V
1.5 V
0 V
VOH
0 V
0 V
1.5 V
3 V
Input
1.3 V
VOH
0.5 V
Output
tPHZ
Output
0 V
1.5 V
3 V
Input
tPLZ
Input
3 V
1.5 V
0 V
Output
1.5 V
Output
VOL
1.3 V
tPZL
4.5 V
VOL
0.5 V
S1 to 1.5 V
S2 Open
S3 Closed
S3 Opened
S2 Closed
S1 to 1.5 V
S1 to 1.5 V
S2 Closed
S3 Closed
S3 Closed
S2 Closed
S1 to 1.5 V
VOLTAGE WAVEFORMS
TEST CIRCUIT
50
S3
5 V
S2
2 k
5 k
S1
1.5 V
1.5 V
1N916 or Equivalent
Generator
(see Note A)
CL = 15 pF
(see Note B)
Figure 8. Receiver Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
1 MHz, 50% duty cycle, tr
6 ns, tf
6 ns,
ZO = 50
.
B. CL includes probe and jig capacitance.
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
MECHANICAL INFORMATION
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
4040047 / D 10/96
0.228 (5,80)
0.244 (6,20)
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
1
14
0.014 (0,35)
0.020 (0,51)
A
0.157 (4,00)
0.150 (3,81)
7
8
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
PINS **
0.008 (0,20) NOM
A MIN
A MAX
DIM
Gage Plane
0.189
(4,80)
(5,00)
0.197
8
(8,55)
(8,75)
0.337
14
0.344
(9,80)
16
0.394
(10,00)
0.386
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0
8
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
MECHANICAL INFORMATION
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
4040140 / C 11/95
28 TERMINALS SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MIN
MAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.740
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)
(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
13
14
15
16
18
17
11
10
8
9
7
5
4
3
2
0.020 (0,51)
0.010 (0,25)
6
1
28
26
27
19
21
B SQ
A SQ
22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold-plated.
E. Falls within JEDEC MS-004
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F AUGUST 1990 REVISED JANUARY 2000
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
MECHANICAL INFORMATION
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE PACKAGE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,20)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0
15
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL-STD-1835 GDIP1-T8
MECHANICAL DATA
MPDI001A JANUARY 1995 REVISED JUNE 1999
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
MECHANICAL INFORMATION
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M
0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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