SN54HC574, SN74HC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Wide Operating Voltage Range of 2 V to 6 V
D
High-Current 3-State Noninverting Outputs
Drive Bus Lines Directly or Up To 15 LSTTL
Loads
D
Low Power Consumption, 80-
A Max I
CC
D
Typical t
pd
= 22 ns
D
6-mA Output Drive at 5 V
D
Low Input Current of 1
A Max
D
Bus-Structured Pinout
description/ordering information
These octal edge-triggered D-type flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high
transition of the clock (CLK) input.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
40 C to 85 C
PDIP N
Tube of 20
SN74HC574N
SN74HC574N
40 C to 85 C
SOIC DW
Tube of 25
SN74HC574DW
HC574
40 C to 85 C
SOIC DW
Reel of 2000
SN74HC574DWR
HC574
40
C to 85
C
SSOP DB
Reel of 2000
SN74HC574DBR
HC574
40
C to 85
C
SOP NS
Reel of 2000
SN74HC574NSR
HC574
TSSOP PW
Tube of 70
SN74HC574PW
HC574
TSSOP PW
Reel of 2000
SN74HC574PWR
HC574
Reel of 250
SN74HC574PWT
55 C to 125 C
CDIP J
Tube of 20
SNJ54HC574J
SNJ54HC574J
55
C to 125
C
CFP W
Tube of 85
SNJ54HC574W
SNJ54HC574W
LCCC FK
Tube of 55
SNJ54HC574FK
SNJ54HC574FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2D
1D
OE
8Q
7Q
V
1Q
8D
GND
CLK
SN54HC574 . . . FK PACKAGE
(TOP VIEW)
CC
SN54HC574 . . . J OR W PACKAGE
SN74HC574 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54HC574, SN74HC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE
CLK
D
OUTPUT
Q
L
H
H
L
L
L
L
H or L
X
Q0
H
X
X
Z
logic diagram (positive logic)
OE
CLK
1D
1Q
1
11
2
19
To Seven Other Channels
1D
C1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
35 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
70 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DB package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
69
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
60
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
83
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN54HC574, SN74HC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54HC574
SN74HC574
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
2
5
6
2
5
6
V
V
High-level input voltage
VCC = 2 V
1.5
1.5
V
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
IH
VCC = 6 V
4.2
4.2
V
Low-level input voltage
VCC = 2 V
0.5
0.5
V
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
IL
VCC = 6 V
1.8
1.8
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
t/ v
Input transition rise/fall time
VCC = 2 V
1000
1000
ns
t/
v
Input transition rise/fall time
VCC = 4.5 V
500
500
ns
VCC = 6 V
400
400
TA
Operating free-air temperature
55
125
40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
SN54HC574
SN74HC574
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
V
V = V
or V
I
= 20 A
2 V
1.9
1.998
1.9
1.9
V
V
V = V
or V
IOH = 20
A
4.5 V
4.4
4.499
4.4
4.4
V
VOH
VI = VIH or VIL
OH
6 V
5.9
5.999
5.9
5.9
V
OH
I
IH
IL
IOH = 6 mA
4.5 V
3.98
4.3
3.7
3.84
IOH = 7.8 mA
6 V
5.48
5.8
5.2
5.34
V
V = V
or V
I
= 20 A
2 V
0.002
0.1
0.1
0.1
V
V
V = V
or V
IOL = 20
A
4.5 V
0.001
0.1
0.1
0.1
V
VOL
VI = VIH or VIL
OL
6 V
0.001
0.1
0.1
0.1
V
OL
I
IH
IL
IOL = 6 mA
4.5 V
0.17
0.26
0.4
0.33
IOL = 7.8 mA
6 V
0.15
0.26
0.4
0.33
II
VI = VCC or 0
6 V
0.1
100
1000
1000
nA
IOZ
VO = VCC or 0
6 V
0.01
0.5
10
5
A
ICC
VI = VCC or 0,
IO = 0
6 V
8
160
80
A
Ci
2 V to 6 V
3
10
10
10
pF
SN54HC574, SN74HC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
TA = 25
C
SN54HC574
SN74HC574
UNIT
VCC
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
f
Clock frequency
2 V
6
4
5
MHz
fclock
Clock frequency
4.5 V
30
20
24
MHz
clock
6 V
38
24
28
t
Pulse duration, CLK high or low
2 V
80
120
100
ns
tw
Pulse duration, CLK high or low
4.5 V
16
24
20
ns
w
6 V
14
20
17
t
Setup time, data before CLK
2 V
100
150
125
ns
tsu
Setup time, data before CLK
4.5 V
20
30
25
ns
su
6 V
17
26
21
t
Hold time, data after CLK
2 V
5
5
5
ns
th
Hold time, data after CLK
4.5 V
5
5
5
ns
h
6 V
5
5
5
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25
C
SN54HC574
SN74HC574
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
f
2 V
6
11
4
5
MHz
fmax
4.5 V
30
36
20
24
MHz
max
6 V
36
40
24
28
t
CLK
Any Q
2 V
90
180
270
225
ns
tpd
CLK
Any Q
4.5 V
28
36
54
45
ns
pd
6 V
24
31
46
38
t
OE
Any Q
2 V
77
150
225
190
ns
ten
OE
Any Q
4.5 V
26
30
45
38
ns
en
6 V
23
26
38
32
t
OE
Any Q
2 V
52
150
225
190
ns
tdis
OE
Any Q
4.5 V
24
30
45
38
ns
dis
6 V
22
26
38
32
t
Any Q
2 V
28
60
90
75
ns
tt
Any Q
4.5 V
8
12
18
15
ns
t
6 V
6
10
15
13
SN54HC574, SN74HC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, C
L
= 150 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25
C
SN54HC574
SN74HC574
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
f
2 V
6
5
MHz
fmax
4.5 V
30
24
MHz
max
6 V
36
28
t
CLK
Any Q
2 V
105
265
400
330
ns
tpd
CLK
Any Q
4.5 V
36
53
80
66
ns
pd
6 V
31
46
68
57
t
OE
Any Q
2 V
95
235
355
295
ns
ten
OE
Any Q
4.5 V
32
47
71
59
ns
en
6 V
28
41
60
51
t
Any Q
2 V
60
210
315
265
ns
tt
Any Q
4.5 V
17
42
63
53
ns
t
6 V
14
36
53
45
operating characteristics, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per flip-flop
No load
100
pF
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