www.ti.com
FEATURES
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
D
CLK
GND
V
CC
Q
3
2
1
4
5
GND
CLK
D
Q
V
CC
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
Available in the Texas Instruments
NanoStarTM and NanoFreeTM Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 4.2 ns at 3.3 V
Low Power Consumption, 10-
A Max I
CC
24-mA Output Drive at 3.3 V
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V
CC
operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting
the level at the output.
NanoStarTM and NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
(2)
NanoStarTM WCSP (DSBGA)
SN74LVC1G80YEAR
0.17-mm Small Bump YEA
NanoFreeTM WCSP (DSBGA)
SN74LVC1G80YZAR
0.17-mm Small Bump YZA (Pb-free)
Reel of 3000
_ _ _CX_
NanoStarTM WCSP (DSBGA)
SN74LVC1G80YEPR
0.23-mm Large Bump YEP
40C to 85C
NanoFreeTM WCSP (DSBGA)
SN74LVC1G80YZPR
0.23-mm Large Bump YZP (Pb-free)
Reel of 3000
SN74LVC1G80DBVR
SOT (SOT-23) DBV
C80_
Reel of 250
SN74LVC1G80DBVT
Reel of 3000
SN74LVC1G80DCKR
SOT (SC-70) DCK
CX_
Reel of 250
SN74LVC1G80DCKT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 19992005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
www.ti.com
LOGIC DIAGRAM (POSITIVE LOGIC)
C
C
TG
C
C
TG
C
C
C
C
C
CLK
D
Q
C
TG
TG
2
1
4
Absolute Maximum Ratings
(1)
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
FUNCTION TABLE
INPUTS
OUTPUT
Q
CLK
D
H
L
L
H
L
X
Q
0
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V
CC
Supply voltage range
0.5
6.5
V
V
I
Input voltage range
(2)
0.5
6.5
V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
0.5
6.5
V
V
O
Voltage range applied to any output in the high or low state
(2) (3)
0.5
V
CC
+ 0.5
V
I
IK
Input clamp current
V
I
< 0
50
mA
I
OK
Output clamp current
V
O
< 0
50
mA
I
O
Continuous output current
50
mA
Continuous current through V
CC
or GND
100
mA
DBV package
206
DCK package
252
JA
Package thermal impedance
(4)
C/W
YEA/YZA package
154
YEP/YZP package
132
T
stg
Storage temperature range
65
150
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
The value of V
CC
is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
2
www.ti.com
Recommended Operating Conditions
(1)
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
MIN
MAX
UNIT
Operating
1.65
5.5
V
CC
Supply voltage
V
Data retention only
1.5
V
CC
= 1.65 V to 1.95 V
0.65 V
CC
V
CC
= 2.3 V to 2.7 V
1.7
V
IH
High-level input voltage
V
V
CC
= 3 V to 3.6 V
2
V
CC
= 4.5 V to 5.5 V
0.7 V
CC
V
CC
= 1.65 V to 1.95 V
0.35 V
CC
V
CC
= 2.3 V to 2.7 V
0.7
V
IL
Low-level input voltage
V
V
CC
= 3 V to 3.6 V
0.8
V
CC
= 4.5 V to 5.5 V
0.3 V
CC
V
I
Input voltage
0
5.5
V
V
O
Output voltage
0
V
CC
V
V
CC
= 1.65 V
4
V
CC
= 2.3 V
8
I
OH
High-level output current
16
mA
V
CC
= 3 V
24
V
CC
= 4.5 V
32
V
CC
= 1.65 V
4
V
CC
= 2.3 V
8
I
OL
Low-level output current
16
mA
V
CC
= 3 V
24
V
CC
= 4.5 V
32
V
CC
= 1.8 V 0.15 V, 2.5 V 0.2 V
20
t/
v
Input transition rise or fall rate
V
CC
= 3.3 V 0.3 V
10
ns/V
V
CC
= 5 V 0.5 V
5
T
A
Operating free-air temperature
40
85
C
(1)
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
www.ti.com
Electrical Characteristics
Timing Requirements
Switching Characteristics
Switching Characteristics
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP
(1)
MAX
UNIT
I
OH
= 100
A
1.65 V to 5.5 V
V
CC
0.1
I
OH
= 4 mA
1.65 V
1.2
I
OH
= 8 mA
2.3 V
1.9
V
OH
V
I
OH
= 16 mA
2.4
3 V
I
OH
= 24 mA
2.3
I
OH
= 32 mA
4.5 V
3.8
I
OL
= 100
A
1.65 V to 5.5 V
0.1
I
OL
= 4 mA
1.65 V
0.45
I
OL
= 8 mA
2.3 V
0.3
V
OL
V
I
OL
= 16 mA
0.4
3 V
I
OL
= 24 mA
0.55
I
OL
= 32 mA
4.5 V
0.55
I
I
CLK or D inputs
V
I
= 5.5 V or GND
0 to 5.5 V
10
A
I
off
V
I
or V
O
= 5.5 V
0
10
A
I
CC
V
I
= 5.5 V or GND,
I
O
= 0
1.65 V to 5.5 V
10
A
I
CC
One input at V
CC
0.6 V,
Other inputs at V
CC
or GND
3 V to 5.5 V
500
A
C
i
V
I
= V
CC
or GND
3.3 V
3.5
pF
(1)
All typical values are at V
CC
= 3.3 V, T
A
= 25C.
over recommended operating free-air temperature range (unless otherwise noted) (see
Figure 1
)
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5.5 V
0.15 V
0.2 V
0.3 V
0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
f
clock
Clock frequency
160
160
160
160
MHz
t
w
Pulse duration, CLK high or low
2.5
2.5
2.5
2.5
ns
Data high
2.3
1.5
1.3
1.1
t
su
Setup time before CLK
ns
Data low
2.5
1.5
1.3
1.1
t
h
Hold time, data after CLK
0
0.2
0.9
0.4
ns
over recommended operating free-air temperature range, C
L
= 15 pF (unless otherwise noted) (see
Figure 1
)
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5 V
FROM
TO
0.15 V
0.2 V
0.3 V
0.5 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
f
max
160
160
160
160
MHz
t
pd
CLK
Q
3
9.1
1.5
6
1.3
4.2
1.1
3.8
ns
over recommended operating free-air temperature range, C
L
= 30 pF or 50 pF (unless otherwise noted) (see
Figure 2
)
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5 V
FROM
TO
0.15 V
0.2 V
0.3 V
0.5 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
f
max
160
160
160
160
MHz
t
pd
CLK
Q
4.4
9.9
2.3
7
2
5.2
1.3
4.5
ns
4
www.ti.com
Operating Characteristics
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
T
A
= 25C
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5 V
PARAMETER
TEST CONDITIONS
UNIT
TYP
TYP
TYP
TYP
C
pd
Power dissipation capacitance
f = 10 MHz
24
24
25
27
pF
5
www.ti.com
PARAMETER MEASUREMENT INFORMATION
V
M
t
h
t
su
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
S1
V
LOAD
Open
GND
R
L
R
L
Data Input
Timing Input
V
I
0 V
V
I
0 V
0 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
I
0 V
Input
Output
Waveform 1
S1 at V
LOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
LOAD
/2
0 V
V
OL
+ V
V
OH
V
0 V
V
I
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
V
LOAD
GND
TEST
S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, Z
O
= 50
.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
G. t
PLH
and t
PHL
are the same as t
pd
.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
I
V
M
V
M
1.8 V
0.15 V
2.5 V
0.2 V
3.3 V
0.3 V
5 V
0.5 V
1 M
1 M
1 M
1 M
V
CC
R
L
2
V
CC
2
V
CC
6 V
2
V
CC
V
LOAD
C
L
15 pF
15 pF
15 pF
15 pF
0.15 V
0.15 V
0.3 V
0.3 V
V
V
CC
V
CC
3 V
V
CC
V
I
V
CC
/2
V
CC
/2
1.5 V
V
CC
/2
V
M
t
r
/t
f
2 ns
2 ns
2.5 ns
2.5 ns
INPUTS
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
Figure 1. Load Circuit and Voltage Waveforms
6
www.ti.com
PARAMETER MEASUREMENT INFORMATION
V
M
t
h
t
su
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
S1
V
LOAD
Open
GND
R
L
R
L
Data Input
Timing Input
V
I
0 V
V
I
0 V
0 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
I
0 V
Input
Output
Waveform 1
S1 at V
LOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
LOAD
/2
0 V
V
OL
+ V
V
OH
V
0 V
V
I
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
V
LOAD
GND
TEST
S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, Z
O
= 50
.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
G. t
PLH
and t
PHL
are the same as t
pd
.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
I
V
M
V
M
1.8 V
0.15 V
2.5 V
0.2 V
3.3 V
0.3 V
5 V
0.5 V
1 k
500
500
500
V
CC
R
L
2
V
CC
2
V
CC
6 V
2
V
CC
V
LOAD
C
L
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V
V
CC
V
CC
3 V
V
CC
V
I
V
CC
/2
V
CC
/2
1.5 V
V
CC
/2
V
M
t
r
/t
f
2 ns
2 ns
2.5 ns
2.5 ns
INPUTS
SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES221O APRIL 1999 REVISED JUNE 2005
Figure 2. Load Circuit and Voltage Waveforms
7
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
SN74LVC1G80DBVR
ACTIVE
SOT-23
DBV
5
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DBVT
ACTIVE
SOT-23
DBV
5
250
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DBVTE4
ACTIVE
SOT-23
DBV
5
250
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKR
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKRG4
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80YEAR
ACTIVE
WCSP
YEA
5
3000
TBD
SNPB
Level-1-260C-UNLIM
SN74LVC1G80YEPR
ACTIVE
WCSP
YEP
5
3000
TBD
SNPB
Level-1-260C-UNLIM
SN74LVC1G80YZAR
ACTIVE
WCSP
YZA
5
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
SN74LVC1G80YZPR
ACTIVE
WCSP
YZP
5
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
6-Jun-2005
Addendum-Page 1
MECHANICAL DATA
MPDS025C FEBRUARY 1997 REVISED FEBRUARY 2002
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,10
M
0,10
0,65
0
8
0,46
0,26
0,13 NOM
4093553-2/D 01/02
0,15
0,30
1,40
1,10
2,40
1,80
4
5
2,15
1,85
1
3
1,10
0,80
0,10
0,00
Seating Plane
0,15
Gage Plane
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
SN74LVC1G80DBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DBVTE4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKR
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKRG4
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80DCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G80YEAR
ACTIVE
WCSP
YEA
5
3000
TBD
SNPB
Level-1-260C-UNLIM
SN74LVC1G80YEPR
ACTIVE
WCSP
YEP
5
3000
TBD
SNPB
Level-1-260C-UNLIM
SN74LVC1G80YZAR
ACTIVE
WCSP
YZA
5
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
SN74LVC1G80YZPR
ACTIVE
WCSP
YZP
5
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
12-Sep-2005
Addendum-Page 1
IMPORTANT NOTICE
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amplifier.ti.com
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interface.ti.com
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www.ti.com/digitalcontrol
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www.ti.com/military
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