THS4502
THS4503
SLOS352D - APRIL 2002 - REVISED JANUARY 2004
WIDEBAND, LOW-DISTORTION FULLY DIFFERENTIAL AMPLIFIERS
DGK-8
DGN-8
D-8
FEATURES
D
Fully Differential Architecture
D
Bandwidth: 370 MHz
D
Slew Rate: 2800 V/
s
D
IMD
3
: -95 dBc at 30 MHz
D
OIP
3
: 51 dBm at 30 MHz
D
Output Common-Mode Control
D
Wide Power Supply Voltage Range: 5 V,
5 V,
12 V, 15 V
D
Centered Input Common-Mode Range
D
Power-Down Capability (THS4502)
D
Evaluation Module Available
DESCRIPTION
The THS4502 and THS4503 are high-performance fully
differential amplifiers from Texas Instruments. The
THS4502, featuring power-down capability, and the
THS4503, without power-down capability, set new
performance standards for fully differential amplifiers
with unsurpassed linearity, supporting 14-bit operation
through 40 MHz. Package options include the 8-pin
SOIC and the 8-pin MSOP with PowerPAD
for a
smaller footprint, enhanced ac performance, and
improved thermal dissipation capability.
APPLICATIONS
D
High Linearity Analog-to-Digital Converter
Preamplifier
D
Wireless Communication Receiver Chains
D
Single-Ended to Differential Conversion
D
Differential Line Driver
D
Active Filtering of Differential Signals
1
2
3
4
8
7
6
5
V
IN-
V
IN+
V
OCM
V
S+
V
OUT+
PD
V
S-
V
OUT-
RELATED DEVICES
DEVICE(1)
DESCRIPTION
THS4500/1
370 MHz, 2800 V/
s, V
ICR
Includes V
S-
THS4502/3
370 MHz, 2800 V/
s, Centered V
ICR
THS4120/1
3.3 V, 100 MHz, 43 V/
s, 3.7 nV
Hz
THS4130/1
15 V, 150 MHz, 51 V/
s, 1.3 nV
Hz
THS4140/1
15 V, 160 MHz, 450 V/
s, 6.5 nV
Hz
THS4150/1
15 V, 150 MHz, 650 V/
s, 7.6 nV
Hz
(1)
Even numbered devices feature power-down capability
APPLICATION CIRCUIT DIAGRAM
f - Frequency - MHz
-80
-92
0
20
40
60
- Third-Order Intermodulation Distortion - dBc
-74
THIRD-ORDER INTERMODULATION
DISTORTION
-62
80
100
-68
-86
-98
12
10
14
16
IMD
3
Bits
V
S
392
+
-
-
+
800
5 V
-5 V
V
OUT
392
402
56.2
50
374
VOCM
2.5 V
-
+
-
+
V
OCM
14 Bit/80 MSps
IN
IN
5 V
V
ref
5 V
-5 V
V
S
0.1
F 10
F
0.1
F 10
F
THS4502
392
10 pF
1
F
56.2
ADC
374
50
402
392
10 pF
24.9
24.9
PowerPAD is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA
information current as of publication date. Products conform to specifications per
the terms of Texas Instruments standard warranty. Production processing does
not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright
2002-2004, Texas Instruments Incorporated
THS4502
THS4503
SLOS352D - APRIL 2002 - REVISED JANUARY 2004
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
UNIT
Supply voltage, V
S
16.5 V
Input voltage, V
I
V
S
Output current, I
O
(2)
150 mA
Differential input voltage, V
ID
4 V
Continuous power dissipation See Dissipation Rating Table
Maximum junction temperature, T
J
(3)
150
C
Maximum junction temperature, continuous
operation, long term reliability T
J
(4)
125
C
Operating free-air
C suffix
0
C to 70
C
Operating free-air
temperature range, T
A
I suffix
-40
C to 85
C
Storage temperature range, T
stg
-65
C to 150
C
Lead temperature
1,6 mm (1/16 inch) from case for 10
seconds
300
C
HBM
4000 V
ESD ratings:
CDM
1000 V
ESD ratings:
MM
100 V
(1)
Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2)
The THS450x may incorporate a PowerPAD on the underside of
the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure
to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI
technical brief SLMA002 for more information about utilizing the
PowerPAD thermally enhanced package.
(3)
The absolute maximum temperature under any condition is
limited by the constraints of the silicon process.
(4)
The maximum junction temperature for continuous operation is
limited by package constraints. Operation above this temperature
may result in reduced reliability and/or lifetime of the device.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE DISSIPATION RATINGS
(1)
POWER RATING
(2)
PACKAGE
JC
(
C/W)
JA
(
C/W)
T
A
25
C
T
A
= 85
C
D (8 pin)
38.3
97.5
1.02 W
410 mW
DGN (8 pin)
4.7
58.4
1.71 W
685 mW
DGK (8 pin)
54.2
260
385 mW
154 mW
(1)
This data was taken using the JEDEC standard High-K test PCB.
(2)
Power rating is determined with a junction temperature of 125
C.
This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the
junction temperature at or below 125
C for best performance and
long term reliability.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
Dual supply
5
7.5
Supply voltage
Single supply
4.5
5
15
V
Operating free-
C suffix
0
70
air temperature,
TA
I suffix
-40
85
C
PACKAGE/ORDERING INFORMATION
ORDERABLE PACKAGE AND NUMBER
TEMPERATURE
PLASTIC
SMALL OUTLINE
PLASTIC MSOP
(1)
PowerPAD
PLASTIC MSOP
(1)
SMALL OUTLINE
(D)
(DGN)
SYMBOL
(DGK)
SYMBOL
THS4502CD
THS4502CDGN
BCG
THS4502CDGK
ATX
0
C to 70
C
THS4503CD
THS4503CDGN
BCK
THS4503CDGK
ATY
THS4502ID
THS4502IDGN
BCI
THS4502IDGK
ASX
-40
C to 85
C
THS4503ID
THS4503IDGN
BCL
THS4503IDGK
ASY
(1)
All packages are available taped and reeled. The R suffix standard quantity is 2500. The T suffix standard quantity is 250 (e.g., THS4502DT).
THS4502
THS4503
SLOS352D - APRIL 2002 - REVISED JANUARY 2004
www.ti.com
3
PIN ASSIGNMENTS
THS4503
(TOP VIEW)
V
IN-
1
2
3
4
8
7
6
5
V
OCM
V
S+
V
OUT+
V
IN+
V
S-
V
OUT-
PD
D, DGN, DGK
THS4502
(TOP VIEW)
D, DGN, DGK
V
IN-
1
2
3
4
8
7
6
5
V
OCM
V
S+
V
OUT+
V
IN+
V
S-
V
OUT-
NC
ELECTRICAL CHARACTERISTICS V
S
=
5 V
Rf = Rg
= 499
, RL = 800
, G = +1, Single-ended input unless otherwise noted.
THS4502 AND THS4503
TYP
OVER TEMPERATURE
MIN/
PARAMETER
TEST CONDITIONS
25
C
25
C
0
C to
70
C
-40
C to
85
C
UNITS
MIN/
TYP/
MAX
AC PERFORMANCE
G = +1, P
IN
= -20 dBm, R
f
= 392
370
MHz
Typ
G = +2, P
IN
= -30 dBm, R
f
= 1 k
175
MHz
Typ
Small-signal bandwidth
G = +5, P
IN
= -30 dBm, R
f
= 1.3 k
70
MHz
Typ
G = +10, P
IN
= -30 dBm, R
f
= 1.3 k
30
MHz
Typ
Gain-bandwidth product
G > +10
300
MHz
Typ
Bandwidth for 0.1dB flatness
P
IN
= -20 dBm
150
MHz
Typ
Large-signal bandwidth
V
P
= 2 V
220
MHz
Typ
Slew rate
4 V
PP
Step
2800
V/
s
Typ
Rise time
2 V
PP
Step
0.8
ns
Typ
Fall time
2 V
PP
Step
0.6
ns
Typ
Settling time to 0.01%
V
O
= 4 V
PP
8.3
ns
Typ
0.1%
V
O
= 4 V
PP
6.3
ns
Typ
Harmonic distortion
G = +1, V
O
= 2 V
PP
Typ
f = 8 MHz
-83
dBc
Typ
2
nd
harmonic
f = 30 MHz
-74
dBc
Typ
f = 8 MHz
-97
dBc
Typ
3
rd
harmonic
f = 30 MHz
-78
dBc
Typ
Third-order intermodulation
distortion
V
O
= 2V
PP
, f
c
= 30 MHz,
R
f
= 392
, 200 kHz tone spacing
-94
dBc
Typ
Third-order output intercept point
f
c
= 30 MHz, R
f
= 392
,
Referenced to 50
52
dBm
Typ
Input voltage noise
f > 1 MHz
6.8
nV/
Hz
Typ
Input current noise
f > 100 kHz
1.7
pA/
Hz
Typ
Overdrive recovery time
Overdrive = 5.5 V
75
ns
Typ
DC PERFORMANCE
Open-loop voltage gain
55
52
50
50
dB
Min
Input offset voltage
-1
-4 / +2
-5 / +3
-6 / +4
mV
Max
Average offset voltage drift
10
10
V/
C
Typ
Input bias current
4
4.6
5
5.2
A
Max
Average bias current drift
10
10
nA/
C
Typ
Input offset current
0.5
1
2
2
A
Max
THS4502
THS4503
SLOS352D - APRIL 2002 - REVISED JANUARY 2004
www.ti.com
4
ELECTRICAL CHARACTERISTICS V
S
=
5 V (continued)
Rf = Rg
= 499
, RL = 800
, G = +1, Single-ended input unless otherwise noted.
PARAMETER
THS4502 AND THS4503
TEST CONDITIONS
PARAMETER
MIN/
TYP/
MAX
OVER TEMPERATURE
TYP
TEST CONDITIONS
PARAMETER
MIN/
TYP/
MAX
UNITS
-40
C to
85
C
0
C to
70
C
25
C
25
C
TEST CONDITIONS
Average offset current drift
40
40
nA/
C
Typ
INPUT
Common-mode input range
4.0
3.7
3.4
3.4
V
Min
Common-mode rejection ratio
80
74
70
70
dB
Min
Input impedance
10
7
|| 1
|| pF
Typ
OUTPUT
Differential output voltage swing
R
L
= 1 k
8
7.6
7.4
7.4
V
Min
Differential output current drive
R
L
= 20
120
110
100
100
mA
Min
Output balance error
P
IN
= -20 dBm, f = 100 kHz
-58
dB
Typ
Closed-loop output impedance
(single-ended)
f = 1 MHz
0.1
Typ
OUTPUT COMMON-MODE VOLTAGE CONTROL
Small-signal bandwidth
R
L
= 400
180
MHz
Typ
Slew rate
2 V
PP
step
87
V/
s
Typ
Minimum gain
1
0.98
0.98
0.98
V/V
Min
Maximum gain
1
1.02
1.02
1.02
V/V
Max
Common-mode offset voltage
+2
-1.6/+6.8
-3.6/+8.8
-4.6/+9.8
mV
Max
Input bias current
V
OCM
= 2.5 V
100
150
170
170
A
Max
Input voltage range
4
3.7
3.4
3.4
V
Min
Input impedance
25 || 1
k
|| pF
Typ
Maximum default voltage
V
OCM
left floating
0
0.05
0.10
0.10
V
Max
Minimum default voltage
V
OCM
left floating
0
-0.05
-0.10
-0.10
V
Min
POWER SUPPLY
Specified operating voltage
5
8.25
8.25
8.25
V
Max
Maximum quiescent current
23
28
32
34
mA
Max
Minimum quiescent current
23
18
14
12
mA
Min
Power supply rejection (
PSRR)
80
76
73
70
dB
Min
POWER DOWN (THS4502 ONLY)
Enable voltage threshold
Device enabled ON above 2.9 V
-2.9
V
Min
Disable voltage threshold
Device disabled OFF below 4.3 V
-4.3
V
Max
Power-down quiescent current
800
1000
1200
1200
A
Max
Input bias current
200
240
260
260
A
Max
Input impedance
50 || 1
k
|| pF
Typ
Turnon time delay
1000
ns
Typ
Turnoff time delay
800
ns
Typ
THS4502
THS4503
SLOS352D - APRIL 2002 - REVISED JANUARY 2004
www.ti.com
5
ELECTRICAL CHARACTERISTICS V
S
= 5 V
Rf = Rg
= 499
, RL = 800
, G = +1, Single-ended input unless otherwise noted.
THS4502 AND THS4503
TYP
OVER TEMPERATURE
MIN/
PARAMETER
TEST CONDITIONS
25
C
25
C
0
C to
70
C
-40
C to
85
C
UNITS
MIN/
TYP/
MAX
AC PERFORMANCE
G = +1, P
IN
= -20 dBm, R
f
= 392
320
MHz
Typ
G = +2, P
IN
= -30 dBm, R
f
= 1 k
160
MHz
Typ
Small-signal bandwidth
G = +5, P
IN
= -30 dBm, R
f
= 1.3 k
60
MHz
Typ
G = +10, P
IN
= -30 dBm, R
f
= 1.3 k
30
MHz
Typ
Gain-bandwidth product
G > +10
300
MHz
Typ
Bandwidth for 0.1 dB flatness
P
IN
= -20 dBm
180
MHz
Typ
Large-signal bandwidth
V
P
= 1 V
200
MHz
Typ
Slew rate
2 V
PP
Step
1300
V/
s
Typ
Rise time
2 V
PP
Step
0.6
ns
Typ
Fall time
2 V
PP
Step
0.8
ns
Typ
Settling time to 0.01%
V
O
= 2 V Step
13.1
ns
Typ
0.1%
V
O
= 2 V Step
8.3
ns
Typ
Harmonic distortion
V
O
= 2 V
PP
Typ
f = 8 MHz,
-81
dBc
Typ
2
nd
harmonic
f = 30 MHz
-60
dBc
Typ
f = 8 MHz
-74
dBc
Typ
3
rd
harmonic
f = 30 MHz
-62
dBc
Typ
Input voltage noise
f > 1 MHz
6.8
nV/
Hz
Typ
Input current noise
f > 100 kHz
1.6
pA/
Hz
Typ
Overdrive recovery time
Overdrive = 5.5 V
75
ns
Typ
DC PERFORMANCE
Open-loop voltage gain
54
51
49
49
dB
Min
Input offset voltage
-0.6
-3.6/+2.4
-4.6/+3.4
-5.6/+4.4
mV
Max
Average offset voltage drift
10
10
V/
C
Typ
Input bias current
4
4.6
5
5.2
A
Max
Average bias current drift
10
10
nA/
C
Typ
Input offset current
0.5
0.7
1.2
1.2
A
Max
Average offset current drift
20
20
nA/
C
Typ
INPUT
Common-mode input range
1 / 4
1.3 / 3.7
1.6 / 3.4
1.6 / 3.4
V
Min
Common-mode rejection ratio
80
74
70
70
dB
Min
Input Impedance
10
7
|| 1
|| pF
Typ
OUTPUT
Differential output voltage swing
R
L
= 1 k
, Referenced to 2.5 V
3.3
2.8
2.6
2.6
V
Min
Output current drive
R
L
= 20
100
90
80
80
mA
Min
Output balance error
P
IN
= -20 dBm, f = 100 kHz
-58
dB
Typ
Closed-loop output impedance
(single-ended)
f = 1 MHz
0.1
Typ
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