ChipFind - документация

Электронный компонент: THS6132VFP

Скачать:  PDF   ZIP

Document Outline

THS6132
SLLS543A SEPTEMBER 2002 REVISED FEBRUARY 2003
HIGH EFFICIENCY CLASS-G ADSL LINE DRIVER
FEATURES
D
Low Total Power Consumption Increases
ADSL Line Card Density (20 dBm on Line)
600 mW w/Active Termination (Full Bias)
530 mW w/Active Termination (Low Bias)
D
Low MTPR of 74 dBc (All Bias Conditions)
D
High Output Current of 500 mA (typ)
D
Wide Supply Voltage Range of
5 V to
15 V
[V
CC(H)
] and
3.3 V to
15 V [V
CC(L)
]
D
Wide Output Voltage Swing of 43 Vpp Into
100-
Differential Load [V
CC(H)
=
12 V]
D
Multiple Bias Modes Allow Low Quiescent
Power Consumption for Short Line Lengths
160-mW/ch Full Bias Mode
135-mW/ch Mid Bias Mode
110-mW/ch Low Bias Mode
75-mW/ch Terminate Only Mode
13-mW/ch Shutdown Mode
D
Low Noise for Increased Receiver Sensitivity
3.3 pA/
Hz Noninverting Current Noise
9.5 pA/
Hz Inverting Current Noise
3.5 nV/
Hz Voltage Noise
APPLICATIONS
D
Ideal for Active Termination Full Rate ADSL
DMT applications (20-dBm Line Power)
DESCRIPTION
The THS6132 is a Class-G current feedback differential
line driver ideal for full rate ADSL DMT systems. Its
extremely low power consumption of 600 mW or lower is
ideal for ADSL systems that must achieve high densities
in ADSL central office rack applications. The unique patent
pending architecture of the THS6132 allows the quiescent
current to be much lower than existing line drivers while
still achieving very high linearity. In addition, the multiple
bias settings of the amplifiers allow for even lower power
consumption for line lengths where the full performance of
the amplifier is not required. The output voltage swing has
been vastly improved over first generation Glass-G
amplifiers and allows the use of lower power supply
voltages that help conserve power. For maximum
flexibility, the THS6132 can be configured in classical
Class-AB mode requiring only as few as one power supply.
THS6132a
1:1
6V
12.4
100
1 k
1 k
1.33 k
1.33 k
576
CODEC
V
IN
CODEC
V
IN+
12.4
+20 dBm
Line
Power
THS6132b
+
+6V
+15V
+
Typical ADSL CO Line Driver Circuit Utilizing Active Impedance Supporting A 6.3 Crest Factor
15 V
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright
20022003, Texas Instruments Incorporated
THS6132
SLLS543A SEPTEMBER 2002 REVISED FEBRUARY 2003
www.ti.com
2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage.
ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
SYMBOL
T
ORDER NUMBER
TRANSPORT
PRODUCT
PACKAGE
PACKAGE
CODE
SYMBOL
TA
ORDER NUMBER
TRANSPORT
MEDIA
THS6132VFP
TQFP 32 PowerPAD
VFP 32
THS6132
THS6132VFP
Tube
THS6132VFP
TQFP-32 PowerPAD
VFP32
THS6132
40
C to 85
C
THS6132VFPR
Tape and reel
THS6132RGW
Leadless 25-pin 5,mm x
5, mm PowerPAD
RGW25
6132
40
C to 85
C
THS6132RGWR
Tape and reel
PACKAGE DISSIPATION RATINGS
PACKAGE
JA
JC
TA
25
C
POWER RATING(1)
TA = 70
C
POWER RATING(1)
TA = 85
C
POWER RATING(1)
VFP32
29.4
C/W
0.96
C/W
3.57 W
2.04 W
1.53 W
RGW25
31
C/W
1.7
C/W
3.39 W
1.94 W
1.45 W
(1) Power rating is determined with a junction temperature of 130
C. This is the point where distortion starts to substantially increase. Thermal
management of the final PCB should strive to keep the junction temperature at or below 125
_
C for best performance.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
THS6132
Supply voltage, VCC(H) and VCC(L) (2)
16.5 V
Input voltage, VI
VCC(L)
Output current, IO (3)
900 mA
Differential input voltage, VIO
2 V
Maximum junction temperature, TJ (see Dissipation Rating Table for more information)
150
C
Operating freeair temperature, TA
40
C to 85
C
Storage temperature, TStg
65
C to 150
C
Lead temperature, 1,6 mm (1/16inch) from case for 10 seconds
300
C
HBM
1 kV
ESD ratings
CDM
500 V
ESD ratings
MM
200 V
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VCC(H) must always be greater than or equal to VCC(L) for proper operation. Class-AB mode operation occurs when VCC(H) is equal to VCC(L)
and is considered acceptable operation for the THS6132 even though it is not fully specified in this mode of operation.
(3) The THS6132 incorporates a PowerPAD on the underside of the chip. This acts as a heatsink and must be connected to a thermally dissipating
plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature that could permanently damage
the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD thermally enhanced package.
PowerPAD is a trademark of Texas Instruments.
THS6132
SLLS543A SEPTEMBER 2002 REVISED FEBRUARY 2003
www.ti.com
3
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
Supply voltage
+VCC(H) to VCC(H)
V
CC(L)
15
16
V
Supply voltage
+VCC(L) to VCC(L)
3.3
5
V
CC(H)
V
Operating free-air temperature, TA
40
85
C
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, TA = 25
C,VCC(H) =
15 V, VCC(L) =
5 V RF = 1.5 k
, Gain = +10, Full Bias Mode, RL
= 50
(unless otherwise noted)
NOISE/DISTORTION PERFORMANCE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Multitone power ratio
Gain =+11, 163kHz to 1.1MHz DMT,
+20 dBm Line Power, 1:1.1 transformer,
active termination, synthesis factor = 4
74
dBc
Receive band spill-over
Gain =+11, 25 kHz to 138 kHz with MTPR signal
applied
95
dBc
2nd harmonic
Differential load = 100
84
dBc
HD
Harmonic distortion (Differential
Configuration f
1 MHz
2nd harmonic
Differential load = 25
69
dBc
HD
Configuration, f = 1 MHz,
VO(PP) = 2 V Gain = +10)
3rd harmonic
Differential load = 100
92
dBc
VO(PP) = 2 V, Gain = +10)
3rd harmonic
Differential load = 25
73
dBc
Vn
Input voltage noise
f = 10 kHz
3.5
nV/
Hz
I
Input current noise
+Input
f = 10 kHz
3.3
pA/
Hz
In
Input current noise
Input
f = 10 kHz
9.5
pA/
Hz
Crosstalk
f = 1 MHz,
RL = 100
,
VO(PP) = 2 V,
Gain = +2
52
dBc
OUTPUT CHARACTERISTICS
VCC(H) =
12 V
RL = 100
10.4
10.8
V
VO
Single ended output voltage swing
VCC(H) =
12 V
RL = 30
9.9
10.4
V
VO
Singleended output voltage swing
VCC(H) =
15 V
RL = 100
13.3
13.8
V
VCC(H) =
15 V
RL = 50
13
13.6
V
Output voltage transition from VCC(L) to
RL = 50
VCC(L) =
5 V
3.1
V
Out ut voltage transition from VCC(L) to
VCC(H) (Point where ICC(L) = ICC(H))
RL = 50
VCC(L) =
6 V
3.9
V
I
O
Output current (1)
RL = 10
VCC(H) =
12 V
500
mA
I
O
Output current (1)
RL = 10
VCC(H) =
15 V
400
500
mA
I(SC)
Short-circuit current (1)
RL = 1
VCC(H) =
15 V
750
mA
Output resistance
Open-loop
5
Output resistance--terminate mode
f = 1 MHz,
Gain = +10
0.35
Output resistance--shutdown mode
f = 1 MHz,
Open-loop
5.5
k
(1) A heatsink is required to keep the junction temperature below absolute maximum rating when an output is heavily loaded or shorted. See
Absolute Maximum Ratings section for more information.
THS6132
SLLS543A SEPTEMBER 2002 REVISED FEBRUARY 2003
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range, TA = 25
C,VCC(H) =
15 V, VCC(L) =
5 V RF = 1.5 k
, Gain = +10, Full Bias Mode, RL
= 50
(unless otherwise noted)
POWER SUPPLY
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCC( )
Operating range
V
CC(H)
VCC(L)
15
16.5
V
VCC(x)
Operating range
V
CC(L)
3
5
VCC(H)
V
VCC(L) =
5 V;
TA = 25
C
5.7
6.4
7.5
mA
Q i
t
t (
h d i
)
VCC(L)
5 V
(VCC(H)=
15 V)
TA = full range
8.1
mA
Quiescent current (each driver)
Full-bias mode
VCC(L) =
6 V;
TA = 25
C
6.7
mA
Full-bias mode
(Bias1 = 1, Bias2 = 1,
VCC(L)
6 V
(VCC(H) =
15 V)
TA = full range
mA
(Bias1 = 1, Bias2 = 1,
Bias3 = X)
(I
t i
d ith V
15 V
VCC(H) =
12 V;
TA = 25
C
3.1
mA
)
(Icc trimmed with VCC(H) =
15 V,
VCC(L) =
5 V)
VCC(H)
12 V
(VCC(L) =
5 V)
TA = full range
mA
VCC(L) =
5 V)
VCC(H) =
15 V;
TA = 25
C
2.9
3.25
3.75
mA
I
CC
VCC(H)
15 V
(VCC(L) =
5 V)
TA = full range
4.25
mA
I
CC
Mid; Bias1 = 1, Bias2 = 0, Bias3 = 1
5.0
5.6
6.8
Quiescent current (each driver)
Variable bias modes
Low; Bias1 = 1, Bias2 = 0, Bias3 = 0
4.25
4.8
6.0
mA
Variable bias modes,
VCC(L) =
5 V
Terminate; Bias1 = 0, Bias2 = 1, Bias3 = X(1)
3.2
3.8
4.5
mA
VCC(L) =
5 V
Shutdown; Bias1 = 0, Bias2 = 0, Bias3 = X(1)
1
1.3
Mid; Bias1 = 1, Bias2 = 0, Bias3 = 1
2.4
2.7
3.0
Quiescent current (each driver)
Variable bias modes
Low ; Bias1 = 1, Bias2 = 0, Bias3 = 0
1.9
2.15
2.4
mA
Variable bias modes,
VCC(H) =
15 V
Terminate; Bias1 = 0, Bias2 = 1, Bias3 = X(1)
1.1
1.3
1.5
mA
VCC(H) =
15 V
Shutdown ; Bias1 = 0, Bias2 = 0, Bias3 = X(1)
0.1
0.5
VCC(L) =
5V
TA = 25
C
70
82
PSRR
Power supply rejection ratio
VCC(L) =
5V
TA = full range
68
dB
PSRR
Power su
ly rejection ratio
(
VCC(x) =
1 V)
VCC(H) =
15V
TA = 25
C
70
82
dB
(
CC(x)
)
VCC(H) =
15V
TA = full range
68
(1) X is used to denote a logic state of either 1 or 0.
THS6132
SLLS543A SEPTEMBER 2002 REVISED FEBRUARY 2003
www.ti.com
5
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range, TA = 25
C,VCC(H) =
15 V, VCC(L) =
5 V RF = 1.5 k
, Gain = +10, Full Bias Mode, RL
= 50
(unless otherwise noted)
DYNAMIC PERFORMANCE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Gain = +1, RF = 750
80
RL 100
Gain = +2, RF = 620
70
MHz
RL = 100
Gain = +5, RF = 500
60
MHz
BW
Single-ended small-signal bandwidth
Gain = +10, RF = 1 k
20
BW
Single ended small signal bandwidth
(3 dB), VO = 0.1 Vrms
Gain = +1, RF = 750
60
( 3 dB), VO 0.1 Vrms
RL 25
Gain = +2, RF = 620
55
MHz
RL = 25
Gain = +5, RF = 500
50
MHz
Gain = +10, RF = 1 k
17
SR
Single-ended slew-rate(1)
VO = 20 VPP,
Gain =+10
300
V/
s
(1) Slew-rate is defined from the 25% to the 75% output levels
DC PERFORMANCE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input offset voltage
TA = 25
C
1
15
Input offset voltage
TA = full range
20
mV
V
OS
Differential offset voltage
VCC(L) =
5 V,
6 V
TA = 25
C
0.3
6
mV
V
OS
Differential offset voltage
VCC(L)
5 V,
6 V
TA = full range
8
Offset drift
TA = full range
40
V/
C
Input bias current
TA = 25
C
1
15
I
Input bias current
VCC(L)
5 V
6 V
TA = full range
20
A
I
IB
+ Input bias current
VCC(L) =
5 V,
6 V
TA = 25
C
1.5
15
A
+ Input bias current
TA = full range
20
Z
OL
Open loop transimpedance
RL = 1 k
2
M