TL087, TL088, TL287, TL288
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS082A D2484, MARCH 1979 REVISED JANUARY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1993, Texas Instruments Incorporated
1
Low Input Offset Voltage . . . 0.5 mV Max
Low Power Consumption
Wide Common-Mode and Differential
Voltage Ranges
Low Input Bias and Offset Currents
High Input Impedance . . . JFET-Input Stage
Internal Frequency Compensation
Latch-Up-Free Operation
High Slew Rate . . . 18 V/
s Typ
Low Total Harmonic Distortion
0.003% Typ
description
These JFET-input operational amplifiers incorporate well-matched high-voltage JFET and bipolar transistors
in a monolithic integrated circuit. They feature low input offset voltage, high slew rate, low input bias and offset
currents, and low temperature coefficient of input offset voltage. Offset-voltage adjustment is provided for the
TL087 and TL088.
The C-suffix devices are characterized for operation from 0
C to 70
C, and the I-suffix devices are characterized
for operation from 40
C to 85
C. The M-suffix devices are characterized for operation over the full military
temperature range of 55
C to 125
C.
AVAILABLE OPTIONS
VIO max
PACKAGE
TA
TYPE
VIO max
AT 25
C
SMALL OUTLINE
(D)
CERAMIC DIP
(JG)
PLASTIC DIP
(P)
FLAT
(U)
0
C
to
Single
0.5 mV
1 mV
TL087CD
TL088CD
TL087CJG
TL088CJG
TL087CP
TL088CP
70
C
Dual
0.5 mV
1 mV
TL287CD
TL288CD
TL287CJG
TL288CJG
TL287CP
TL288CP
40
C
to
Single
0.5 mV
1 mV
TL087ID
TL088ID
TL087IJG
TL088IJG
TL087IP
TL088IP
85
C
Dual
0.5 mV
1 mV
TL287ID
TL288ID
TL287IJG
TL288IJG
TL287IP
TL288IP
55
C
to
Single
1 mV
TL088MJG
TL088MU
125
C
Dual
1 mV
TL288MJG
TL288MU
The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL087CDR).
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
TL087, TL088, TL287, TL288
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS082A D2484, MARCH 1979 REVISED JANUARY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2
1OUT
1IN
1IN+
V
CC
+
OUT
IN +
IN
NC No internal connection
1
2
3
4
8
7
6
5
OFFSET N1
IN
IN+
V
CC
NC
V
CC+
OUT
OFFSET N2
TL087, TL088
D, JG, OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC
OFFSET N1
IN
IN+
V
CC
NC
NC
V
CC+
OUT
OFFSET N2
TL088M
U PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
V
CC +
2OUT
2IN
2IN+
TL287, TL288
D, JG, OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC
1OUT
1IN
1IN+
V
CC
NC
V
CC +
2OUT
2IN
2IN+
TL288M
U PACKAGE
(TOP VIEW)
symbol (each amplifier)
TL087, TL088, TL287, TL288
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS082A D2484, MARCH 1979 REVISED JANUARY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
TL088M
TL288M
TL087I
TL088I
TL287I
TL288I
TL087C
TL088C
TL287C
TL288C
UNIT
Supply voltage, VCC + (see Note 1)
18
18
18
V
Supply voltage, VCC (see Note 1)
18
18
18
V
Differential input voltage (see Note 2)
30
30
30
V
Input voltage (see Notes 1 and 3)
15
15
15
V
Input current, II (each Input
)
1
1
1
mA
Output current, IO (each output)
80
80
80
mA
Total VCC + terminal current
160
160
160
mA
Total VCC terminal current
160
160
160
mA
Duration of output short circuit (see Note 4)
unlimited
unlimited
unlimited
Continuous total dissipation
See Dissipation Rating Table
Operating free-air temperature range
55 to 125
25 to 85
0 to 70
C
Storage temperature range
65 to 150
65 to 150
65 to 150
C
Lead temperature 1,6 mm (1/16 inch) from
case for 60 seconds
JG or U package
300
300
300
C
Lead temperature 1,6 mm (1/16 inch) from
case for 10 seconds
D or P package
260
260
C
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC.
2. Differential voltages are at the noninverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
C
TA = 70
C
POWER RATING
TA = 85
C
POWER RATING
TA = 125
C
POWER RATING
D
725 mW
5.8 mW/
C
464 mW
377 mW
N/A
JG
1050 mW
8.4 mW/
C
672 mW
546 mW
210 mW
P
1000 mW
8.0 mW/
C
640 mW
520 mW
N/A
U
675 mW
5.4 mW/
C
432 mW
351 mW
135 mW
recommended operating conditions
C-SUFFIX
I-SUFFIX
M-SUFFIX
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
Supply voltage, VCC
5
5
5
5
5
15
V
Common mode input voltage VIC
VCC
=
5 V
1
4
1
4
1
4
V
Common-mode input voltage, VIC
VCC
=
15 V
11
11
11
11
11
11
V
Input voltage VI
VCC
=
5 V
1
4
1
4
1
4
V
Input voltage, VI
VCC
=
15 V
11
11
11
11
11
11
V
Operating free-air temperature, TA
0
70
40
85
55
125
C
TL087, TL088, TL287, TL288
JFET
-INPUT OPERA
TIONAL
AMPLIFIERS
SLOS082A D2484, MARCH 1979 REVISED JANUAR
Y 1993
4
POST
OFFICE BOX 655303 DALLAS,
TEXAS
75265
POST
OFFICE BOX 1443 HOUST
ON,
TEXAS
77001
electrical characteristics, V
CC
=
15 V
PARAMETER
TEST CONDITIONS
TL088M
TL288M
TL087I
TL088I
TL287I
TL288I
TL087C
TL088C
TL287C
TL288C
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
RS = 50
,
TL087, TL287
0.1
0.5
0.1
0.5
VO = 0
TL088 TL288
0 1
3
0 1
1
0 1
1
V
Input offset voltage
TA = 25
C
TL088, TL288
0.1
3
0.1
1
0.1
1
mV
VIO
Input offset voltage
RS = 50
,
TL087, TL287
2
1.5
mV
VO = 0,
TL088 TL288
6
3
2 5
TA = full range
TL088, TL288
6
3
2.5
VIO
Temperature coefficient
RS = 50
TA = 25
C to MAX
10
8
8
V/
C
VIO
of input offset voltage
RS = 50
,
TA = 25
C to MAX
10
8
8
V/
C
IIO
Input offset current
TA = 25
C
5
5
100
5
100
pA
IIO
Input offset current
TA = full range
25
3
2
nA
IIB
Input bias current
TA = 25
C
30
30
200
30
200
pA
TA = full range
100
20
7
nA
Common mode input
VCC + 4
VCC + 4
VCC + 4
VICR
Common-mode input
voltage range
TA = 25
C
to
to
to
V
voltage range
VCC + 4
VCC + 4
VCC + 4
Maximum peak to peak
TA = 25
C,
RL = 10 k
24
27
24
27
24
27
VO(PP)
Maximum-peak-to-peak
output voltage swing
TA = full range
RL
10 k
24
24
24
V
(
)
out ut voltage swing
TA = full range
RL
2 k
20
20
20
RL
2 k
,
VO =
10 V,
50
105
50
105
50
105
AVD
Large-signal differential
TA = 25
C
50
105
50
105
50
105
V/mV
AVD
voltage amplification
RL
2 k
,
VO =
10 V,
25
25
25
V/mV
TA = full range
25
25
25
B1
Unity-gain bandwidth
TA = 25
C
3
3
3
MHz
ri
Input resistance
TA = 25
C
1012
1012
1012
CMRR
Commonmode rejection
RS = 50
,
VO = 0 V,
80
93
80
93
80
93
dB
CMRR
j
ratio
VIC = VICR min, TA = 25
C
80
93
80
93
80
93
dB
Supply voltage rejection
RS = 50
,
VO = 0 V,
kSVR
Supply voltage rejection
ratio (
VCC
/
VIO)
VCC
=
9 V to
15 V,
80
99
80
99
80
99
dB
ratio (
VCC
/
VIO)
TA = 25
C
ICC
Supply current
No load,
VO = 0 V,
26
2 8
2 6
2 8
2 6
2 8
mA
ICC
y
(per amplifier)
TA = 25
C
26
2.8
2.6
2.8
2.6
2.8
mA
All characteristics are measured under openloop conditions with zero common-mode input voltage unless otherwise specified. Full range for TA is 55
C to 125
C for TL_88M;
40
C to 85
C for TL_8_I; and 0
C to 70
C for TL_8_C.
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain
the junction temperature as close to the ambient temperature as possible.
TL087, TL088, TL287, TL288
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS082A D2484, MARCH 1979 REVISED JANUARY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
5
operating characteristics V
CC
=
15 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TL088M, TL288M
TL087I, TL087C
TL088I, TL088C
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
SR
Slew rate at unity gain
VI = 10 V,
CL = 100 pF,
RL = 2 k
,
AVD = 1
18
8
18
V/
s
tr
Rise time
VI = 20 mV,
RL = 2 k
,
55
55
ns
Overshoot factor
CL = 100 pF,
AVD = 1
25%
25%
Vn
Equivalent input noise voltage
RS = 100
,
f = 1 kHz
19
19
nV/
Hz
PARAMETER MEASUREMENT INFORMATION
VI
+
VCC +
VCC
VO
CL
(see Note A)
Overshoot
10%
90%
tr Rise Time
RL
NOTE A: CL includes fixture capacitance.
Figure 1. Slew Rate, Rise/Fall Time,
Figure 2. Rise Time and Overshoot
and Overshoot Test Circuit
Waveform
VCC
VCC +
VO
CL
VO
VCC
VCC +
RS
RS
10 k
RL
VI
10 k
100
NOTE A: CL includes fixture capacitance.
+
+
(see Note A)
Figure 3. Noise Voltage Test Circuit
Figure 4. Unity-Gain Brandwidth and
Phase Margin Test Circuit
pA
VCC +
VCC
Ground Shield
pA
Figure 5. Input Bias and Offset
Current Test Circuit
+
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