TL5812, TL5812l
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS011B OCTOBER 1985 REVISED MAY 1993
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Drives up to 20 Lines
D
70-V Output Voltage Swing Capability
D
40-mA Output Source Current Capability
D
High-Speed Serially-Shifted Data Input
D
CMOS-Compatible Inputs
D
Direct Replacement for Sprague UCN5812A
description
The TL5812 and TL5812I are monolithic BIDFET
integrated circuits designed to drive a dot matrix
or segmented vacuum fluorescent display (VFD).
Each device features a serial data output to
cascade additional devices for large display
arrays.
A 20-bit data word is serially loaded into the shift
register on the low-to-high transition of CLOCK.
Parallel data is transferred to the output buffers
through a 20-bit D-type latch while LATCH
ENABLE is high and is latched when LATCH
ENABLE is low. When BLANKING is high, all
outputs are low.
The outputs are totem-pole structures formed by
npn emitter-follower and double-diffused MOS
(DMOS) transistors with output voltage ratings of
70 V and a source-current capability of 40 mA. All
inputs are CMOS compatible.
The TL5812 is characterized for operation from
0
C to 70
C. The TL5812I is characterized for
operation from 40
C to 85
C.
BIDFET Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process.
Copyright
1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
3 2 1
13 14
5
6
7
8
9
10
11
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q18
Q17
Q16
Q15
Q14
Q13
Q12
4
15 16 17 18
BLANKING
CLOCK
LA
TCH ENABLE (STROBE)
Q10
Q9
Q19
Q20
SERIAL
DA
T
A
OUT
28 27 26
25
24
23
22
21
20
19
12
Q1
1
DA
T
A
IN
Q1
V
CC1
GND
V
CC2
FN PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC2
SERIAL DATA OUT
Q20
Q19
Q18
Q17
Q16
Q15
Q14
Q13
Q12
Q11
BLANKING
GND
V
CC1
DATA IN
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
LATCH ENABLE (STROBE)
CLOCK
N PACKAGE
(TOP VIEW)
TL5812, TL5812l
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS011B OCTOBER 1985 REVISED MAY 1993
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic symbol
DATA IN
CLOCK
LATCH ENABLE
BLANKING
27
15
16
13
FLUOR DISP
CMOS/VAC
C2
EN 3
SRG20
C1/
1D
3
2D
2D
2D
2D
2D
2D
3
3
3
3
3
SERIAL OUT
Q2O
Q19
Q11
Q10
Q2
Q1
2
3
4
12
17
25
26
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
LC1
LC2
LC19
1D
C1
1D
C1
1D
C1
1D
C1
C2
2D
C2
2D
C2
2D
C2
2D
Shift
Registers
BLANKING
LATCH ENABLE
DATA IN
CLOCK
SERIAL OUT
Q20
Q19
Q2
Q1
LC20
Latches
R20
R19
R2
R1
16 Stages
(Q3 thru Q18)
Not Shown
TL5812, TL5812l
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS011B OCTOBER 1985 REVISED MAY 1993
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
CONTROL INPUTS
SHIFT REGISTERS
LATCHES
OUTPUTS
FUNCTION
CLOCK
LATCH
ENABLE
BLANKING
SHIFT REGISTERS
R1 THRU R20
LATCHES
LC1 THRU LC20
SERIAL
Q1 THRU Q20
Load
No
X
X
X
X
Load and shift
No change
Determined by
LATCH ENABLE
R20
R20
Determined by BLANKING
Latch
X
X
L
H
X
X
As determined above
Stored data
New data
R20
R20
Determined by BLANKING
Blank
X
X
X
X
H
L
As determined above
Determined by
LATCH ENABLE
R20
R20
All L
LC1 thru LC10, respectively
H = high level, L = low level, X = irrelevant,
= low-to-high-level transition.
R20 takes on the state of R19, R19 takes on the state of R18, ... R2 takes on the state of R1, and R1 takes on the state of the data input.
New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.
typical operating sequence
Invalid
CLOCK
DATA IN
SR
Contents
LATCH
ENABLE
Latch
Contents
BLANKING
Q Outputs
Valid
Irrelevant
Valid
Previously Stored Data
New Data Valid
Valid
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
TYPICAL OF SERIAL OUTPUT
VCC1
Input
GND
VCC1
Output
GND
VCC2
Output
GND
TYPICAL OF ALL Q OUTPUTS
TL5812, TL5812l
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS011B OCTOBER 1985 REVISED MAY 1993
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC1
(see Note 1)
15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, V
CC2
70 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, V
O
70 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
0.3 V to V
CC1
+0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current,
I
O
40 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation
See Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: TL5812
0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TL5812I 40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range,
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 10 seconds: FN package
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package
260
C
. . . . . . . . . . . . . . . . . . . . .
NOTE 1: All voltage values are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
DERATING FACTOR
TA = 70
C
TA = 85
C
PACKAGE
A
POWER RATING
ABOVE TA = 25
C
A
POWER RATING
A
POWER RATING
FN
1400 mW
11.2 mW/
C
896 mW
728 mW
N
1150 mW
9.2 mW/
C
736 mW
598 mW
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VCC1
4.5
15
V
Supply voltage, VCC2
0
60
V
High-level input voltage, VIH
VCC1 1.5
VCC1+0.3
V
Low-level input voltage, VIL
0.3
0.8
V
High-level output current, IOH
40
mV
Operating free air temperature TA
TL5812
0
70
C
Operating free-air temperature, TA
TL5812I
40
85
C
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic voltage
levels.
TL5812, TL5812l
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS011B OCTOBER 1985 REVISED MAY 1993
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over operating free-air temperature range, V
DD
= 5 V to 15 V, V
BB
= 60 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Q outputs
IOH = 25 mA
57.5
58.2
VOH
High-level output
SERIAL DATA OUT
VCC1 = 5 V,
IOH = 20
A
4.5
4.9
V
SERIAL DATA OUT
VCC1 = 15 V,
IOH = 20
A
14.5
14.9
Q outputs
IOL = 1 mA,
BLANKING at VCC1
0.7
1.5
VOL
Low-level output voltage
SERIAL DATA OUT
VCC1 = 5 V,
IOL = 20
A
0.06
0.3
V
SERIAL DATA OUT
VCC1 = 15 V,
IOL = 20
A
0.03
0.3
IIH
High-level input current
VI = VCC1
0.3
1
A
IIL
Low-level input current
VI = 0
0.3
1
A
IOL
Low-level output current (pulldown current)
VO = 60 V,
BLANKING at VCC1
2.5
3.2
A
IO(off)
Off-state output current
VO = 0,
BLANKING at VCC1
< 1
15
A
ICC2
Supply current from VCC2
Outputs high
3.5
8
mA
ICC2
Supply current from VCC2
Outputs low
0.02
0.5
mA
ICC1
Supply current from VCC1
VCC1 = 5 V
1.5
3
mA
ICC1
Supply current from VCC1
VCC1= 15 V
1.7
4
mA
All typical characteristics are at TA= 25
C.
timing requirements over operating free-air temperature range
MIN
MAX
UNIT
t (CKH)
Pulse duration CLOCK high
VCC1 = 5 V
500
ns
tw(CKH)
Pulse duration, CLOCK high
VCC1 = 15 V
100
ns
t (LEH)
Pulse duration LATCH ENABLE high
VCC1 = 5 V
500
ns
tw(LEH)
Pulse duration, LATCH ENABLE high
VCC1 = 15 V
100
ns
t
(D)
Setup time DATA IN before CLOCK
VCC1 = 5 V
150
ns
tsu(D)
Setup time, DATA IN before CLOCK
VCC1 = 15 V
75
ns
th(D)
Hold time DATA IN after CLOCK
VCC1 = 5 V
150
ns
th(D)
Hold time, DATA IN after CLOCK
VCC1 = 15 V
75
ns
td(CKH LEH) Delay time CLOCK
to LATCH ENABLE high
VCC1 = 5 V
150
ns
td(CKH-LEH) Delay time, CLOCK
to LATCH ENABLE high
VCC1 = 15 V
75
ns
switching characteristics, V
BB
= 60 V, T
A
= 25
C
PARAMETER
MIN
TYP
MAX
UNIT
t d
Propagation delay time LATCH ENABLE to Q outputs
VCC1 = 5 V
2.2
s
tpd
Propagation delay time, LATCH ENABLE to Q outputs
VCC1 = 15 V
0.8
s
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