TLC5540
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER
SLAS105C JANUARY 1995 REVISED MAY 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
features
D
8-Bit Resolution
D
Differential Linearity Error
0.3 LSB Typ,
1 LSB Max (25
C)
1 LSB Max
D
Integral Linearity Error
0.6 LSB,
0.75 LSB Max (25
C)
1 LSB Max
D
Maximum Conversion Rate of
40 Megasamples Per Second (MSPS) Max
D
Internal Sample and Hold Function
D
5-V Single Supply Operation
D
Low Power Consumption . . . 85 mW Typ
D
Analog Input Bandwidth . . .
75 MHz Typ
D
Internal Reference Voltage Generators
applications
D
Quadrature Amplitude Modulation (QAM)
and Quadrature Phase Shift Keying (QPSK)
Demodulators
D
Digital Television
D
Charge-Coupled Device (CCD) Scanners
D
Video Conferencing
D
Digital Set-Top Box
D
Digital Down Converters
D
High-Speed Digital Signal Processor
Front End
description
The TLC5540 is a high-speed, 8-bit analog-to-digital converter (ADC) that converts at sampling rates up to
40 megasamples per second (MSPS). Using a semiflash architecture and CMOS process, the TLC5540 is able
to convert at high speeds while still maintaining low power consumption and cost. The analog input bandwidth
of 75 MHz (typ) makes this device an excellent choice for undersampling applications. Internal resistors are
provided to generate 2-V full-scale reference voltages from a 5-V supply, thereby reducing external
components. The digital outputs can be placed in a high impedance mode. The TLC5540 requires only a single
5-V supply for operation.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE
DGND
D1(LSB)
D2
D3
D4
D5
D6
D7
D8(MSB)
V
DDD
CLK
DGND
REFB
REFBS
AGND
AGND
ANALOG IN
V
DDA
REFT
REFTS
V
DDA
V
DDA
V
DDD
PW OR NS PACKAGE
(TOP VIEW)
AVAILABLE OPTIONS
0
C to 70
C
SOP (NS)
TA
TLC5540CNSLE
PACKAGE
TSSOP (PW)
TLC5540CPW
40
C to 85
C
TLC5540INSLE
TLC5540IPW
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1999, Texas Instruments Incorporated
TLC5540
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER
SLAS105C JANUARY 1995 REVISED MAY 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
Lower Sampling
Comparators
(4 Bit)
Lower Encoder
(4 Bit)
Lower Data
Latch
Lower Sampling
Comparators
(4 Bit)
Lower Encoder
(4 Bit)
Upper Sampling
Comparators
(4 Bit)
Upper Encoder
(4 Bit)
Upper Data
Latch
Clock
Generator
OE
D1(LSB)
D2
D3
D4
D5
D6
D7
D8(MSB)
CLK
REFB
REFT
REFBS
AGND
AGND
ANALOG IN
VDDA
REFTS
270
NOM
80
NOM
320
NOM
Resistor
Reference
Divider
schematics of inputs and outputs
EQUIVALENT OF ANALOG INPUT
VDDA
AGND
ANALOG IN
EQUIVALENT OF EACH DIGITAL INPUT
VDDD
DGND
OE, CLK
EQUIVALENT OF EACH DIGITAL OUTPUT
VDDD
DGND
D1 D8
TLC5540
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER
SLAS105C JANUARY 1995 REVISED MAY 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AGND
20, 21
Analog ground
ANALOG IN
19
I
Analog input
CLK
12
I
Clock input
DGND
2, 24
Digital ground
D1 D8
3 10
O
Digital data out. D1:LSB, D8:MSB
OE
1
I
Output enable. When OE = L, data is enabled. When OE = H, D1D8 is high impedance.
VDDA
14, 15, 18
Analog VDD
VDDD
11, 13
Digital VDD
REFB
23
I
ADC reference voltage in (bottom)
REFBS
22
Reference voltage (bottom). When using the internal voltage divider to generate a nominal 2-V reference,
the REFBS terminal is shorted to the REFB terminal and the REFTS terminal is shorted to the REFT terminal
(see Figure 13 and Figure 14).
REFT
17
I
Reference voltage in (top)
REFTS
16
Reference voltage (top). When using the internal voltage divider to generate a nominal 2-V reference, the
REFTS terminal is shorted to the REFT terminal and the REFBS terminal is shorted to the REFB terminal
(see Figure 13 and Figure 14).
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
DDA
, V
DDD
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference voltage input range, V
I(REFT)
, V
I(REFB)
,
V
I(REFBS)
, V
I(REFTS)
AGND to V
DDA
. . . . . . . . . . . . . . .
Analog input voltage range, V
I(ANLG)
AGND to V
DDA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range, V
I(DGTL)
DGND to V
DDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital output voltage range, V
O(DGTL)
DGND to V
DDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: TLC5540C
0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLC5540I 40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
55
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
TLC5540
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER
SLAS105C JANUARY 1995 REVISED MAY 1999
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
VDDA AGND
4.75
5
5.25
V
Supply voltage
VDDD AGND
4.75
5
5.25
V
AGND DGND
100
0
100
mV
Reference input voltage (top), VI(REFT)
VI(REFB)+1.8 VI(REFB)+2
VDDA
V
Reference input voltage (bottom), VI(REFB)
0
0.6
VI(REFT)1.8
V
Analog input voltage range, VI(ANLG) (see Note 1)
VI(REFB)
VI(REFT)
V
Full scale voltage, VI(REFT) VI(REFB)
1.8
5
V
High-level input voltage, VIH
4
V
Low-level input voltage, VIL
1
V
Pulse duration, clock high, tw(H)
12.5
ns
Pulse duration, clock low, tw(L)
12.5
ns
Operating free air temperature TA
TLC5540C
0
70
C
Operating free-air temperature, TA
TLC5540I
40
85
C
NOTE 1: 1.8 V
VI(REFT) VI(REFB)
<
VDD
TLC5540
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER
SLAS105C JANUARY 1995 REVISED MAY 1999
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics at V
DD
= 5 V, V
I(REFT)
= 2.6 V, V
I(REFB)
= 0.6 V, f
s
= 40 MSPS, T
A
= 25
C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
EL
Linearity error integral
TA = 25
C
0.6
1
EL
Linearity error, integral
fs = 40 MSPS,
TA = MIN to MAX
1
LSB
ED
Linearity error differential
s
,
VI = 0.6 V to 2.6 V
TA = 25
C
0.3
0.75
LSB
ED
Linearity error, differential
TA = MIN to MAX
1
Self bias (1), VRB
Short REFB to REFBS
See Figure 13
0.57
0.61
0.65
Self bias (1), VRT
Short REFT to REFTS
See Figure 13
2.47
2.63
2.80
V
Self bias (2), VRB
Short REFB to AGND
See Figure 14
AGND
V
Self bias (2), VRT
Short REFT to REFTS
See Figure 14
2.18
2.29
2.4
Iref
Reference-voltage current
VI(REFT) VI(REFB) = 2 V
5.2
7.5
12
mA
Rref
Reference-voltage resistor
Between REFT and REFB terminals
165
270
350
Ci
Analog input capacitance
VI(ANLG) = 1.5 V + 0.07 Vrms
4
pF
EZS
Zero-scale error
VI(REFT) VI(REFB) = 2 V
18
43
68
mV
EFS
Full-scale error
VI(REFT) VI(REFB) = 2 V
25
0
25
mV
IIH
High-level input current
VDD = 5.25 V,
VIH = VDD
5
A
IIL
Low-level input current
VDD = 5.25 V,
VIL = 0
5
A
IOH
High-level output current
OE = GND,
VDD = 4.75 V, VOH = VDD 0.5 V
1.5
mA
IOL
Low-level output current
OE = GND,
VDD = 4.75 V, VOL = 0.4 V
2.5
mA
IOZH(lkg)
High-level
high-impedance-state
output leakage current
OE = VDD,
VDD = 5.25,
VOH = VDD
16
A
IOZL(lkg)
Low-level
high-impedance-state
output leakage current
OE = VDD,
VDD = 4.75,
VOL = 0
16
A
IDD
Supply current
fs = 40 MSPS,
CL
25 pF,
NTSC ramp wave input,
See Note 2
17
27
mA
Conditions marked MIN or MAX are as stated in recommended operating conditions.
National Television System Committee
NOTE 2: Supply current specification does not include Iref.
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