TLC7524C, TLC7524E, TLC7524I

8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Easily Interfaced to Microprocessors

On-Chip Data Latches

Monotonic Over the Entire A/D Conversion
Range

Segmented High-Order Bits Ensure
Low-Glitch Output

Interchangeable With Analog Devices
AD7524, PMI PM-7524, and Micro Power
Systems MP7524

Fast Control Signaling for Digital
Signal-Processor Applications Including
Interface With TMS320

CMOS Technology

KEY PERFORMANCE SPECIFICATIONS

Resolution
Linearity error
Power dissipation at VDD = 5 V
Setting time
Propagation delay time

8 Bits

1/2 LSB Max

5 mW Max

100 ns Max

80 ns Max

description

The TLC7524C, TLC7524E, and TLC7524I are
CMOS, 8-bit, digital-to-analog converters (DACs)
designed for easy interface to most popular
microprocessors.

The devices are 8-bit, multiplying DACs with input latches and load cycles similar to the write cycles of a random
access memory. Segmenting the high-order bits minimizes glitches during changes in the most significant bits,
which produce the highest glitch impulse. The devices provide accuracy to 1/2 LSB without the need for thin-film
resistors or laser trimming, while dissipating less than 5 mW typically.

Featuring operation from a 5-V to 15-V single supply, these devices interface easily to most microprocessor
buses or output ports. The 2- or 4-quadrant multiplying makes these devices an ideal choice for many
microprocessor-controlled gain-setting and signal-control applications.

The TLC7524C is characterized for operation from 0

C to 70

C. The TLC7524I is characterized for operation

from 25

C to 85

C. The TLC7524E is characterized for operation from 40

C to 85

AVAILABLE OPTIONS

PACKAGE

SMALL OUTLINE

PLASTIC DIP

(D)

PLASTIC CHIP CARRIER

(FN)

PLASTIC DIP

(N)

SMALL OUTLINE

(PW)

C to 70

TLC7524CD

TLC7524CFN

TLC7524CN

TLC7524CPW

C to 85

TLC7524ID

TLC7524IFN

TLC7524IN

TLC7524IPW

C to 85

TLC7524ED

TLC7524EFN

TLC7524EN

1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

OUT1
OUT2

GND

DB7
DB6
DB5
DB4
DB3

REF
V

WR
CS
DB0
DB1
DB2

1 20 19

9 10 11 12 13

WR
NC
CS
DB0

GND

DB7

DB6
DB5

FN PACKAGE

(TOP VIEW)

OUT2

OUT1

DB2

DB1

REF

DB4

DB3

NCNo internal connection

D, N, OR PW PACKAGE

(TOP VIEW)

TLC7524C, TLC7524E, TLC7524I
8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

functional block diagram

Data Inputs

Data Latches

REF

DB0

(LSB)

DB5

DB6

DB7

(MSB)

GND

OUT2

OUT1

RFB

S-8

S-3

S-2

S-1

Terminal numbers shown are for the D or N package.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

0.3 V to 16.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Digital input voltage range, V

0.3 V to V

+ 0.3 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Reference voltage, V

ref

25 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak digital input current, I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

: TLC7524C

C to 70

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TLC7524I

C to 85

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TLC7524E

C to 85

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

C to 150

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Case temperature for 10 seconds, T

: FN package

260

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package

260

. . . . . . . . . . .

TLC7524C, TLC7524E, TLC7524I

8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

recommended operating conditions

VDD = 5 V

VDD = 15 V

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

Supply voltage, VDD

4.75

5.25

14.5

15.5

Reference voltage, Vref

High-level input voltage, VIH

2.4

13.5

Low-level input voltage, VIL

0.8

1.5

CS setup time, tsu(CS)

CS hold time, th(CS)

Data bus input setup time, tsu(D)

Data bus input hold time, th(D)

Pulse duration, WR low, tw(WR)

TLC7524C

Operating free-air temperature, TA

TLC7524I

TLC7524E

electrical characteristics over recommended operating free-air temperature range, V

ref

10 V,

OUT1 and OUT2 at GND (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VDD = 5 V

VDD = 15 V

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

IIH

High-level input current

VI = VDD

IIL

Low-level input current

VI = 0

IIk

Output leakage

OUT1

DB0DB7 at 0 V,
Vref =

10 V

WR, CS at 0 V,

400

200

IIkg

current

OUT2

DB0DB7 at VDD,
Vref =

10 V

WR, CS at 0 V,

400

200

IDD

Supply current

Quiescent

DB0DB7 at VIHmin or VILmax

IDD

Supply current

Standby

DB0DB7 at 0 V or VDD

500

kSVS

Supply voltage sensitivity,

gain/

VDD

VDD =

10%

0.01

0.16

0.005

0.04

%FSR/%

Input capacitance,
DB0DB7, WR, CS

VI = 0

OUT1

DB0 DB7 at 0 V

WR CS at 0 V

Output capacitance

OUT2

DB0DB7 at 0 V,

WR, CS at 0 V

120

Output capacitance

OUT1

DB0 DB7 at V

WR CS at 0 V

120

OUT2

DB0DB7 at VDD, WR, CS at 0 V

Reference input impedance
(REF to GND)

TLC7524C, TLC7524E, TLC7524I
8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

operating characteristics over recommended operating free-air temperature range, V

ref

10 V,

OUT1 and OUT2 at GND (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VDD = 5 V

VDD = 15 V

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

Linearity error

0.5

LSB

Gain error

See Note 1

2.5

LSB

Settling time (to 1/2 LSB)

See Note 2

100

Propagation delay from digital input
to 90% of final analog output current

See Note 2

Feedthrough at OUT1 or OUT2

Vref =

10 V (100-kHz sinewave)

WR and CS at 0 V, DB0DB7 at 0 V

0.5

%FSR

Temperature coefficient of gain

TA = 25

C to MAX

0.004

0.001

%FSR/

NOTES:

1. Gain error is measured using the internal feedback resistor. Nominal full-scale range (FSR) = Vref 1 LSB.
2. OUT1 load = 100

, Cext = 13 pF, WR at 0 V, CS at 0 V, DB0 DB7 at 0 V to VDD or VDD to 0 V.

operating sequence

DB0DB7

th(D)

ÎÎÎ

tsu(D)

tw(WR)

th(CS)

tsu(CS)

TLC7524C, TLC7524E, TLC7524I

8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

voltage-mode operation

It is possible to operate the current-multiplying DAC in these devices in a voltage mode. In the voltage mode,
a fixed voltage is placed on the current output terminal. The analog output voltage is then available at the
reference voltage terminal. Figure 1 is an example of a current-multiplying DAC, which is operated in voltage
mode.

REF (Analog Output Voltage)

OUT2

OUT1 (Fixed Input Voltage)

Figure 1. Voltage Mode Operation

The relationship between the fixed-input voltage and the analog-output voltage is given by the following
equation:

= V

(D/256)

where

= analog output voltage

= fixed input voltage

D = digital input code converted to decimal

In voltage-mode operation, these devices meet the following specification:

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Linearity error at REF

VDD = 5 V,

OUT1 = 2.5 V,

OUT2 at GND,

TA = 25

LSB

TLC7524C, TLC7524E, TLC7524I
8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

The TLC7524C, TLC7524E, and TLC7524I are 8-bit multiplying DACs consisting of an inverted R-2R ladder,
analog switches, and data input latches. Binary-weighted currents are switched between the OUT1 and OUT2
bus lines, thus maintaining a constant current in each ladder leg independent of the switch state. The high-order
bits are decoded. These decoded bits, through a modification in the R-2R ladder, control three equally-weighted
current sources. Most applications only require the addition of an external operational amplifier and a voltage
reference.

The equivalent circuit for all digital inputs low is seen in Figure 2. With all digital inputs low, the entire reference
current, I

ref

, is switched to OUT2. The current source I/256 represents the constant current flowing through the

termination resistor of the R-2R ladder, while the current source I

Ikg

represents leakage currents to the

substrate. The capacitances appearing at OUT1 and OUT2 are dependent upon the digital input code. With all
digital inputs high, the off-state switch capacitance (30 pF maximum) appears at OUT2 and the on-state switch
capacitance (120 pF maximum) appears at OUT1. With all digital inputs low, the situation is reversed as shown
in Figure 2. Analysis of the circuit for all digital inputs high is similar to Figure 2; however, in this case, I

ref

would

be switched to OUT1.

The DAC on these devices interfaces to a microprocessor through the data bus and the CS and WR control
signals. When CS and WR are both low, analog output on these devices responds to the data activity on the
DB0DB7 data bus inputs. In this mode, the input latches are transparent and input data directly affects the
analog output. When either the CS signal or WR signal goes high, the data on the DB0DB7 inputs are latched
until the CS and WR signals go low again. When CS is high, the data inputs are disabled regardless of the state
of the WR signal.

These devices are capable of performing 2-quadrant or full 4-quadrant multiplication. Circuit configurations for
2-quadrant or 4-quadrant multiplication are shown in Figure 3 and Figure 4. Table 1 and Table 2 summarize input
coding for unipolar and bipolar operation respectively.

Iref

REF

OUT2

OUT1

RFB

120 pF

30 pF

IIkg

I/256

IIkg

Figure 2. TLC7524 Equivalent Circuit With All Digital Inputs Low

TLC7524C, TLC7524E, TLC7524I

8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

SLAS061C SEPTEMBER 1986 REVISED NOVEMBER 1998

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

Output

RA = 2 k

(see Note A)

DB0DB7

Vref

C (see Note B)

VDD

GND

OUT2

OUT1

RFB

NOTES: A. RA and RB used only if gain adjustment is required.

B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent

ringing or oscillation.

Figure 3. Unipolar Operation (2-Quadrant Multiplication)

Output

20 k

5 k

10 k

20 k

RFB

OUT1

OUT2

GND

VDD

C (see Note B)

Vref

DB0DB7

(see Note A)

RA = 2 k

NOTES: A. RA and RB used only if gain adjustment is required.

B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent ringing or oscillation.

Figure 4. Bipolar Operation (4-Quadrant Operation)

Table 1. Unipolar Binary Code

Table 2. Bipolar (Offset Binary) Code

DIGITAL INPUT

(see Note 3)

ANALOG OUTPUT

DIGITAL INPUT

(see Note 4)

ANALOG OUTPUT

MSB

LSB

MSB

LSB

1 1 1 1 1 1 1 1

Vref (255/256)

1 1 1 1 1 1 1 1

Vref (127/128)

1 0 0 0 0 0 0 1

Vref (129/256)

1 0 0 0 0 0 0 1

Vref (1/128)

1 0 0 0 0 0 0 0

Vref (128/256) = Vref/2

1 0 0 0 0 0 0 0

0 1 1 1 1 1 1 1

Vref (127/256)

0 1 1 1 1 1 1 1

Vref (1/128)

0 0 0 0 0 0 0 1

Vref (1/256)

0 0 0 0 0 0 0 1

Vref (127/128)

0 0 0 0 0 0 0 0

Vref

NOTE 3: LSB = 1/256 (Vref)

NOTE 4: LSB = 1/128 (Vref)

IMPORTANT NOTICE

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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL
APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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BE FULLY AT THE CUSTOMER'S RISK.

In order to minimize risks associated with the customer's applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI's publication of information regarding any third
party's products or services does not constitute TI's approval, warranty or endorsement thereof.

1998, Texas Instruments Incorporated

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TLC7524

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TLC7524