TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E JULY 1997 REVISED OCTOBER 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
features
D
10-Bit Resolution 20 MSPS Sampling
Analog-to-Digital Converter (ADC)
D
Power Dissipation . . . 107 mW Typ
D
5-V Single Supply Operation
D
Differential Nonlinearity . . .
0.5 LSB Typ
D
No Missing Codes
D
Power Down (Standby) Mode
D
Three State Outputs
D
Digital I/Os Compatible With 5-V or 3.3-V
Logic
D
Adjustable Reference Input
D
Small Outline Package (SOIC), Super Small
Outline Package (SSOP), or Thin Small
Outline Package (TSOP)
D
Pin Compatible With the Analog
Devices AD876
applications
D
Communications
D
Multimedia
D
Digital Video Systems
D
High-Speed DSP Front-End . . . TMS320C6x
description
The TLC876 is a CMOS, low-power, 10-bit, 20
MSPS analog-to-digital converter (ADC). The
speed, resolution, and single-supply operation
are suited for applications in video, multimedia,
imaging, high-speed acquisition, and commu-
nications. The low-power and single-supply operation satisfy requirements for high-speed portable
applications. The speed and resolution ideally suit charge-coupled device (CCD) input systems such as color
scanners, digital copiers, electronic still cameras, and camcorders. A multistage pipelined architecture with
output error correction logic provides for no missing codes over the full operating temperature range. Force and
sense connections to the reference inputs provide a more accurate internal reference voltage to the reference
resistor string.
A standby mode of operation reduces the power to typically 15 mW. The digital I/O interfaces to either 5-V or
3.3-V logic and the digital output terminals can be placed in a high-impedance state. The format of the output
data is straight binary coding.
A pipelined multistaged architecture achieves a high sample rate with low power consumption. The TLC876
distributes the conversion over several smaller ADC sub-blocks, refining the conversion with progressively
higher accuracy as the device passes the results from stage to stage. This distributed conversion requires a
small fraction of the 1023 comparators used in a traditional flash ADC. A sample-and-hold amplifier (SHA) within
each of the stages permits the first stage to operate on a new input sample while the second through the fifth
stages operate on the four preceding samples.
The TLC876C is characterized for operation from 0
C to 70
C, the TLC876I is characterized for operation from
40
C to 85
C, and the TLC876M is characterized for operation over the full military temperature range of 55
C
to 125
C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AGND
DRV
DD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DRGND
DGND
AV
DD
AIN
CML
REFBS
REFBF
NC
REFTF
REFTS
DGND
AGND
DV
DD
STBY
OE
CLK
(TOP VIEW)
NC No internal connection
DB, DW, OR PW PACKAGE
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E JULY 1997 REVISED OCTOBER 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGE
TA
SUPER SMALL
OUTLINE
(DB)
SMALL
OUTLINE
(DW)
TSSOP
(PW)
0
C to 70
C
TLC876CDB
TLC876CDW
TLC876CPW
40
C to 85
C
TLC876IDB
TLC876IDW
TLC876IPW
55
C to 125
C
--
TLC876MDW
--
functional block diagram
ADC
DAC
ADC
DAC
ADC
DAC
ADC
Correction Logic
Output Buffers
SHA
SHA
GAIN
SHA
GAIN
SHA
GAIN
AIN
(MSB) D9
(LSB) D0
Sample and hold amplifier
2
2
2
2
10
10
ADC
DAC
SHA
GAIN
2
12
3
27
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E JULY 1997 REVISED OCTOBER 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
equivalent input and output circuits
DVDD
DGND
DRVDD
DRGND
DVDD
DRVDD
DGND
DRGND
AVDD
AGND
AVDD
AVSS
AVDD
AGND
30
29
REFTF
REFTS
Internal Reference
Voltage
AVDD
AGND
AVDD
AVSS
34
35
REFBF
REFBS
Internal Reference
Voltage
D0D9 OUTPUT CIRCUIT
ALL DIGITAL INPUT CIRCUITS
AIN INPUT CIRCUIT
REFERENCE INPUT CIRCUIT
D0D9
CLK
AIN
0.5 pF typ
30
typ
0.3 pF
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E JULY 1997 REVISED OCTOBER 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AGND
1, 19
Analog ground
AIN
27
I
Analog input
AVDD
28
5-V analog supply
CLK
15
I
Clock input
CML
26
O
Bypass for an internal bias point. Typically a 0.1
F capacitor minimum is connected from this terminal to ground.
DGND
14, 20
Digital ground
DVDD
18
5-V digital supply
DRVDD
2
3.3-V/5-V digital supply. Supply for digital input and output buffers.
DRGND
13
3.3-V/5-V digital ground. Ground for digital input and output buffers.
D0 D9
3 12
O
Digital data out. D0:LSB, D9:MSB
OE
16
I
Output enable. When OE = low or NC, the device is in normal operating mode. When OE = high, D0D9 are high
impedance.
REFBF
24
I
Reference bottom force
REFBS
25
I
Reference bottom sense
REFTF
22
I
Reference top force
REFTS
21
I
Reference top sense
STBY
17
I
Standby enable. When STBY = low or NC, the device is in normal operating mode. When STBY = high, the device
is in standby mode.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, AV
DD
to AGND, DV
DD
to DGND
0.3 V to 6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference voltage input range to AGND, V
I(REFTF)
, V
I(REFBF)
,
V
I(REFBS)
,
V
I(REFTS)
0.3 V to AV
DD
+ 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog input voltage range to AGND
0.3 V to AV
DD
+ 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range
0.3 V to DV
DD
+ 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital output voltage range applied from external source
0.5 V to DV
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
55
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: TLC876C
0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLC876I 40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLC876M 55
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
C
TA = 70
C
POWER RATING
TA = 85
C
POWER RATING
TA = 125
C
POWER RATING
DB
1353 mW
10.82 mW/
C
866 mW
703 mW
--
DW
1598 mW
12.78 mW/
C
1023 mW
831 mW
320 mW
PW
1207 mW
9.65 mW/
C
772 mW
627 mW
--
This is the inverse of the traditional junction-to-ambient thermal resistance (R
JA). Thermal resistance is not production tested,
and values given are for informational purposes only.
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E JULY 1997 REVISED OCTOBER 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
analog and reference inputs
MIN
NOM
MAX
UNIT
Reference input voltage (top), VI(REFT)
VI(REFB) + 1
3.6
4.5
V
Reference input voltage (bottom), VI(REFB)
0
1.6
VI(REFT) 1
V
Analog input voltage, VI(AIN)
1
2
Vpp
power supply
MIN
NOM
MAX
UNIT
AVDD
4.5
5.25
Supply voltage
DVDD
4.5
5.25
V
DRVDD
3
5.25
The voltage difference between AVDD and DVDD terminals cannot exceed 0.5 V to maintain performance specifications.
digital inputs
MIN
NOM
MAX
UNIT
DRVDD = 3 V
2.4
High-level input voltage, VIH
DRVDD = 5 V
4
V
DRVDD = 5.25 V
4.2
DRVDD = 3 V
0.6
Low-level input voltage, VIL
DRVDD = 5 V
1
V
DRVDD = 5.25 V
1.05
Clock period, tc (see Figure 1)
50
ns
Pulse duration, clock high, tw(CLKH)
23
25
ns
Pulse duration, clock low, tw(CLKL)
23
25
ns
TLC876C
0
70
Operating free-air temperature, TA
TLC876I
40
85
C
TLC876M
55
125
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