ChipFind - документация

Электронный компонент: TPA3004D2PHP

Скачать:  PDF   ZIP

Document Outline

TPA3004D2
SLOS407A FEBRUARY 2003 MARCH 2003
12-W STEREO CLASS-D AUDIO POWER AMPLIFIER
WITH DC VOLUME CONTROL
1
www.ti.com
FEATURES
D
12-W/Ch Into an 8-
Load From 15-V Supply
D
Efficient, Class-D Operation Eliminates
Heatsinks and Reduces Power Supply
Requirements
D
32-Step DC Volume Control From 40 dB
to 36 dB
D
Line Outputs For External Headphone
Amplifier With Volume Control
D
Regulated 5-V Supply Output for Powering
TPA6110A2
D
Space-Saving, Thermally-Enhanced
PowerPAD
Packaging
D
Thermal and Short-Circuit Protection
APPLICATIONS
D
LCD Monitors and TVs
D
Powered Speakers
DESCRIPTION
The TPA3004D2 is a 12-W (per channel) efficient,
Class-D audio amplifier for driving bridged-tied stereo
speakers. The TPA3004D2 can drive stereo speakers
as low as 4
. The high efficiency of the TPA3004D2
eliminates the need for external heatsinks when playing
music.
Stereo speaker volume is controlled with a dc voltage
applied to the volume control terminal offering a range
of gain from 40 dB to 36 dB. Line outputs, for driving
external headphone amplifier inputs, are also dc
voltage controlled with a range of gain from 56 dB to
20 dB.
An integrated 5-V regulated supply is provided for
powering an external headphone amplifier.
Cs
Cs
10 nF
Cbs
Cs
Cs
10 nF
Cbs
PVCC
PVCC
Cs
Cs
10 nF
Cbs
Cs
Cs
10 nF
Cbs
PVCC
PVCC
220 pF
Cosc
Rosc
Ccpl
100 nF
Cvdd
Ccpr
Crinp
Crinn
Clinn
Clinp
LINP
LINN
RINN
RINP
SYSTEM CONTROL
VOL
VARDIFF
VARMAX
BSLP
PVCCL
PVCCL
LOUTP
LOUTP
PGNDL
PGNDL
LOUTN
LOUTN
PVCCL
PVCCL
BSLN
TPA3004D2
VCLAMPR
SD
V2P5
RINP
LINN
LINP
AVDDREF
VREF
VARDIFF
VARMAX
VOLUME
REFGND
MODE
MODE_OUT
VAROUTR
VAROUTL
AVDD
AGND
COSC
ROSC
AVCC
VCLAMPL
BSRP
PVCCR
PVCCR
ROUTP
ROUTP
PGNDR
PGNDR
ROUTN
ROUTN
PVCCR
PVCCR
BSRN
RINN
AVDD
AVCC
C2p5
FADE
10
F
10
F
0.1
F
0.1
F
1
F
1
F
1
F
1
F
1
F
0.1
F
0.1
F
10
F
10
F
1
F
120 k
1
F
10 k
10 k
Cs
0.1
F
Cvcc
10
F
MODE_OUT
RLINE_OUT
LLINE_OUT
SYSTEM CONTROL
SYSTEM CONTROL
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
TPA3004D2
SLOS407A FEBRUARY 2003 MARCH 2003
2
www.ti.com
AVAILABLE OPTIONS
T
PACKAGED DEVICE
TA
48-PIN HTQFP (PHP)
40
C to 85
C
TPA3004D2PHP
The PHP package is available taped and reeled. To order a taped and
reeled part, add the suffix R to the part number (e.g., TPA3004D2PHPR).
PHP PACKAGE
(TOP VIEW)
13
14
15 16 17
18 19
20 21 22 23
24
25
26
27
28
29
30
31
32
33
34
35
36
48
47
46 45 44
43 42
41 40 39 38
37
1
2
3
4
5
6
7
8
9
10
11
12
BSRN
PVCCR
PVCCR
ROUTN
ROUTN
PGNDR
PGNDR
ROUTP
ROUTP
PVCCR
PVCCR
BSRP
VCLAMPR
MODE_OUT
MODE
VAROUTR
VAROUTL
FADE
COSC
ROSC
AGND
VCLAMPL
SD
RINN
RINP
V2P5
LINP
LINN
VREF
VARDIFF
VARMAX
VOLUME
REFGND
BSLN
PVCCL
PVCCL
LOUTN
LOUTN
PGNDL
PGNDL
LOUTP
LOUTP
PVCCL
PVCCL
BSLP
TPA3004D2
AV
CC
AV
DD
AV
DD
REF
TPA3004D2
SLOS407A FEBRUARY 2003 MARCH 2003
3
www.ti.com
functional block diagram
Biases
&
References
TTL Input
Buffer
Startup
Protection
Logic
OC
Detect
Thermal
VDDok
RINP
RINN
VAROUTR
Ramp
Generator
COSC
ROSC
VCCok
5V LDO
AVCC
AVDD
AVDD
VDD
Deglitch &
Modulation
Logic
Gain
Adj.
Rfdbk2
Rfdbk2
Cint2
Cint2
Gain
Control
Deglitch &
Modulation
Logic
Gain
Adj.
Rfdbk2
Rfdbk2
Cint2
Cint2
LINP
LINN
VAROUTL
Gate
Drive
VClamp
Gen
Gate
Drive
PVCC
BSRP
PVCCR(2)
ROUTP(2)
PGNDR
PGNDR
ROUTN(2)
PVCCR(2)
BSRN
Gate
Drive
VClamp
Gen
Gate
Drive
PVCC
BSLP
PVCCL(2)
LOUTP(2)
PGNDL
PGNDL
LOUTN(2)
PVCCL(2)
BSLN
VCLAMPL
VCLAMPR
VOLUME
VARDIFF
VARMAX
To Gain Adj.
Blocks
SD
VREF
REFGND
V2P5
V2P5
V2P5
Mode
Control
MODE
MODE_OUT
AVCC
AGND
AVDDREF
Gain
Adj.
Gain
Adj.
V2P5
V2P5
V2P5
V2P5
FADE
TPA3004D2
SLOS407A FEBRUARY 2003 MARCH 2003
4
www.ti.com
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NO.
NAME
I/O
DESCRIPTION
AGND
26
Analog ground for digital/analog cells in core
AVCC
33
High-voltage analog power supply (8.5 V to 18 V)
AVDD
29
O
5-V Regulated output capable of 100-mA output
AVDDREF
7
O
5-V Reference output--provided for connection to adjacent VREF terminal.
BSLN
13
I/O
Bootstrap I/O for left channel, negative high-side FET
BSLP
24
I/O
Bootstrap I/O for left channel, positive high-side FET
BSRN
48
I/O
Bootstrap I/O for right channel, negative high-side FET
BSRP
37
I/O
Bootstrap I/O for right channel, positive high-side FET
COSC
28
I/O
I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5
FADE
30
I
Input for controlling volume ramp rate. A logic low on this pin places the amplifier in fade mode. A logic high
on this pin allows a quick transition to the desired volume setting when cycling SD or during power-up.
LINN
6
I
Negative differential audio input for left channel
LINP
5
I
Positive differential audio input for left channel
LOUTN
16, 17
O
Class-D 1/2-H-bridge negative output for left channel
LOUTP
20, 21
O
Class-D 1/2-H-bridge positive output for left channel
MODE
34
I
Input for MODE control. A logic high on this pin places the amplifier in the variable output mode and the
Class-D outputs are disabled. A logic low on this pin places the amplifier in the Class-D mode and Class-D
stereo outputs are enabled. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode
to be used as line-level outputs for external amplifiers.
MODE_OUT
35
O
Output for control of the variable output amplifiers. When the MODE pin (34) is a logic high, the MODE_OUT
pin is driven low. When the MODE pin (34) is a logic low, the MODE_OUT pin is driven high. This pin is
intended for MUTE control of an external headphone amplifier. Leave unconnected when not used for
headphone amplifier control.
PGNDL
18, 19
Power ground for left channel H-bridge
PGNDR
42, 43
Power ground for right channel H-bridge
PVCCL
14, 15
Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to PVCCR or
AVCC.
PVCCL
22, 23
Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to PVCCR or
AVCC.
PVCCR
38,39
Power supply for right channel H-bridge (tied to pins 46 and 47 internally), not connected to PVCCL or
AVCC.
PVCCR
46, 47
Power supply for right channel H-bridge (tied to pins 38 and 39 internally), not connected to PVCCL or
AVCC.
REFGND
12
Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume, connect the DAC
ground to this terminal.
RINP
3
I
Positive differential audio input for right channel
RINN
2
I
Negative differential audio input for right channel
ROSC
27
I/O
Current setting resistor for ramp generator. Nominally equal to 1/8*VCC
ROUTN
44, 45
O
Class-D 1/2-H-bridge negative output for right channel
ROUTP
40, 41
O
Class-D 1/2-H-bridge positive output for right channel
SD
1
I
Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to VCC.
VARDIFF
9
I
DC voltage to set the difference in gain between the Class-D and VAROUT outputs. Connect to GND or
AVDDREF if VAROUT outputs are unconnected.
VARMAX
10
I
DC voltage that sets the maximum gain for the VAROUT outputs. Connect to GND or AVDDREF if VAROUT
outputs are unconnected.
VAROUTL
31
O
Variable output for left channel audio. Line level output for driving external HP amplifier.
TPA3004D2
SLOS407A FEBRUARY 2003 MARCH 2003
5
www.ti.com
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NO.
NAME
I/O
DESCRIPTION
VAROUTR
32
O
Variable output for right channel audio. Line level output for driving external HP amplifier.
VCLAMPL
25
Internally generated voltage supply for left channel bootstrap capacitors.
VCLAMPR
36
Internally generated voltage supply for right channel bootstrap capacitors.
VOLUME
11
I
DC voltage that sets the gain of the Class-D and VAROUT outputs.
VREF
8
I
Analog reference for gain control section.
V2P5
4
O
2.5-V Reference for analog cells, as well as reference for unused audio input when using single-ended
inputs.
--
Thermal
Pad
Connect to AGND and PGND--should be center point for both grounds.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range: AV
CC,
PV
CC
0.3 V to 20 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load impedance, R
L
3.6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
: MODE, VREF, VARDIFF, VARMAX, VOLUME, FADE
0 V to 5.5 V
. . . . . . . . . . . . . . . . . . . . .
SD
0.3 V to V
CC
+ 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RINN, RINP, LINN, LINP
0.3 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply current:
AV
DD
120 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AVDDREF
10 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current,
VAROUTL, VAROUTR
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation
See Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating junction temperature range, T
J
40
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The (TPA3004D2) incorporates an exposed PowerPAD on the underside of the chip. This acts as a heatsink and must be connected to a thermally
dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature that couldm
permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD thermally enhanced
package.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
DERATING FACTOR
TA = 70
C
TA = 85
C
PHP
4.3 W
34.7 mW/
C
2.7 W
2.2 W
The PowerPAD must be soldered to a thermal land on the printed circuit board. Please refer to the PowerPAD
Thermally Enhanced Package application note (SLMA002).