TPS3705-30, TPS3705-33, TPS3705-50
TPS3707-25, TPS3707-30, TPS3707-33, TPS3707-50
PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL
SLVS184B NOVEMBER 1998 REVISED JANUARY 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
features
D
Power-On Reset Generator with Fixed
Delay Time of 200 ms, no External
Capacitor Needed
D
Precision Supply Voltage Monitor 2.5 V, 3 V,
3.3 V, and 5 V
D
Pin-For-Pin Compatible with the MAX705
through MAX708 Series
D
Integrated Watchdog Timer (TPS3705 only)
D
Voltage Monitor for Power-Fail or
Low-Battery Warning
D
Maximum Supply Current of 50
A
D
MSOP-8 and SO-8 Packages
D
Temperature Range . . . 40
C to 85
C
typical applications
D
Designs Using DSPs, Microcontrollers or
Microprocessors
D
Industrial Equipment
D
Programmable Controls
D
Automotive Systems
D
Portable/Battery Powered Equipment
D
Intelligent Instruments
D
Wireless Communication Systems
D
Notebook/Desktop Computers
Figure 1. Typical MSP430 Application
MR
RESET
TPS370550
PFI
VDD
GND
100 nF
RESET/NMI
VDD
GND
5 V
12 V
910 k
120 k
MSP430P112
PFO
WDI
WDO
I/O
I/O
Copyright
1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
MR
V
DD
GND
PFI
WDO
RESET
WDI
PFO
TPS3705 . . . D PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
RESET
RESET
NC
PFO
TPS3707 . . . D PACKAGE
(TOP VIEW)
NC No internal connection
MR
V
DD
GND
PFI
1
2
3
4
8
7
6
5
RESET
WDO
MR
V
DD
WDI
PFO
PFI
GND
TPS3705 . . . DGN PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
NC
PFO
PFI
GND
TPS3707 . . . DGN PACKAGE
(TOP VIEW)
NC No internal connection
RESET
RESET
MR
V
DD
TPS3705-30, TPS3705-33, TPS3705-50
TPS3707-25, TPS3707-30, TPS3707-33, TPS3707-50
PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL
SLVS184B NOVEMBER 1998 REVISED JANUARY 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description
The TPS3705, TPS3707 family of microprocessor supply-voltage supervisors provide circuit initialization and
timing supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted when the supply voltage V
DD
becomes higher than 1.1 V. Thereafter, the
supply voltage supervisor monitors V
DD
and keeps RESET active as long as V
DD
remains below the threshold
voltage V
IT+
. An internal timer delays the return of the output to the inactive state (high) to ensure proper system
reset. The delay time, t
d typ
= 200 ms, starts after V
DD
has risen above the threshold voltage V
IT+
. When the supply
voltage drops below the threshold voltage V
IT
, the output becomes active (low) again. No external components
are required. All the devices of this family have a fixed-sense threshold voltage V
IT
set by an internal voltage
divider.
The TPS3705-xx and TPS3707-xx devices incorporate a manual reset input, MR. A low level at MR causes
RESET to become active.
The TPS370x-xx families integrate a power-fail comparator which can be used for low-battery detection,
power-fail warning, or for monitoring a power supply other than the main supply.
The TPS3705-xx devices have a watchdog timer that is periodically triggered by a positive or negative transition
at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval,
t
t(out)
= 1.6 s, WDO becomes active. This event also reinitializes the watchdog timer. Leaving WDI unconnected
disables the watchdog.
The TPS3707-xx devices do not have the Watchdog function, but include a high-level output RESET.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in
either 8-pin MSOP or standard SOIC packages. The TPS3705, TPS3707 devices are characterized for
operation over a temperature range of 40
C to 85
C.
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
THRESHOLD
VOLTAGE
SMALL OUTLINE
(D)
POWERPAD
TM
-SMALL OUTLINE
(DGN)
MARKING DGN
PACKAGE
CHIP FORM
(Y)
2.63 V
TPS370530D
TPS370530DGN
TIAAT
TPS3705-30Y
2.93 V
TPS370533D
TPS370533DGN
TIAAU
TPS370533Y
4.55 V
TPS370550D
TPS370550DGN
TIAAV
TPS370550Y
40
C to 85
C
2.25 V
TPS370725D
TPS370725DGN
TIAAW
TPS370725Y
2.63 V
TPS370730D
TPS370730DGN
TIAAX
TPS370730Y
2.93 V
TPS370733D
TPS370733DGN
TIAAY
TPS370733Y
4.55 V
TPS370750D
TPS370750DGN
TIAAZ
TPS370750Y
TPS3705-30, TPS3705-33, TPS3705-50
TPS3707-25, TPS3707-30, TPS3707-33, TPS3707-50
PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL
SLVS184B NOVEMBER 1998 REVISED JANUARY 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Function Tables
TRUTH TABLE, TPS3705
MR
VDD>VIT
RESET
TYPICAL
DELAY
H
L
1
H
L
30 ns
L
H
1
L
H
200 ms
H
1
0
H
L
3
s
H
0
1
L
H
200 ms
TRUTH TABLE, TPS3707
MR
VDD>VIT
RESET
RESET
TYPICAL
DELAY
H
L
1
H
L
L
H
30 ns
L
H
1
L
H
H
L
200 ms
H
1
0
H
L
L
H
3
s
H
0
1
L
H
H
L
200 ms
TRUTH TABLE, TPS370x
PFI>VIT
PFO
TYPICAL
DELAY
0
1
L
H
0.5
s
1
0
H
L
0.5
s
functional block diagram
Reset
Logic + Timer
_
+
_
+
R1
R2
14 k
Reference
Voltage
of 1.25 V
Watchdog
Logic + Timer
Oscillator
40 k
Transition
Detection
VDD
MR
GND
PFI
WDI
RESET
RESET
PFO
WDO
Only
TPS3705
Only
TPS3707
Only
TPS3705
TPS3705
TPS3707
TPS3705-30, TPS3705-33, TPS3705-50
TPS3707-25, TPS3707-30, TPS3707-33, TPS3707-50
PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL
SLVS184B NOVEMBER 1998 REVISED JANUARY 1999
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing diagrams
t
t
t
VDD
5 V
4.5 V
1.1 V
0 V
MR
5 V
4.5 V
1.1 V
0 V
RESET
5 V
4.5 V
1.1 V
0 V
t d
t d
t d
Undefined Behavior
t
WDI
5 V
4.5 V
1.1 V
0 V
t
WDO
5 V
4.5 V
1.1 V
0 V
t t(out)
Don't Care
Don't Care
Don't Care
TPS3705-30, TPS3705-33, TPS3705-50
TPS3707-25, TPS3707-30, TPS3707-33, TPS3707-50
PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL
SLVS184B NOVEMBER 1998 REVISED JANUARY 1999
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TPS370xY chip information
These chips, when properly assembled, display characteristics similar to those of the TPS370x. Thermal
compression or ultrasonic bonding may be caused on the doped-aluminum bonding pads. The chips may be
mounted with conductive epoxy or a gold-silicon preform.
TPS3705Y
TPS3707Y
(1)
(2)
(3)
(8)
(6)
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 10 MILS TYPICAL
BONDING PADS: 4
4 MINIMUM
TJ max = 150
C
TOLERANCES ARE
10%
ALL DIMENSIONS ARE IN MILS
46
50
(4)
(7)
(5)
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
MR
1
I
Manual reset
VDD
2
Supply voltage
GND
3
Ground
PFI
4
I
Power-fail comparator input
PFO
5
O
Power-fail comparator output
WDI
TPS3705
6
I
Watchdog timer input
NC
TPS3707
6
No internal connection
RESET
7
O
Active-low reset output
WDO
TPS3705
8
O
Watchdog timer output
RESET
TPS3707
8
O
Active-high reset output
PDF 
ZIP