TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q
TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS
SLVS092F NOVEMBER 1994 REVISED JANUARY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Available in 5-V, 4.85-V, and 3.3-V
Fixed-Output and Adjustable Versions
D
Very Low-Dropout Voltage . . . Maximum of
32 mV at I
O
= 100 mA (TPS7150)
D
Very Low Quiescent Current Independent
of Load . . . 285
A Typ
D
Extremely Low Sleep-State Current
0.5
A Max
D
2% Tolerance Over Specified Conditions
For Fixed-Output Versions
D
Output Current Range of 0 mA to 500 mA
D
TSSOP Package Option Offers Reduced
Component Height for Space-Critical
Applications
D
Power-Good (PG) Status Output
description
The TPS71xx integrated circuits are a family
of micropower low-dropout (LDO) voltage
regulators. An order of magnitude reduction in
dropout voltage and quiescent current over
conventional LDO performance is achieved by
replacing the typical pnp pass transistor with a
PMOS device.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (maximum of 32
mV at an output current of 100 mA for the TPS7150) and is directly proportional to the output current (see
Figure 1). Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very
low and remains independent of output loading (typically 285
A over the full range of output current, 0 mA to
500 mA). These two key specifications yield a significant improvement in operating life for battery-powered
systems. The LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down
the regulator, reducing the quiescent current to 0.5
A maximum at T
J
= 25
C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1997, Texas Instruments Incorporated
NC No internal connection
1
2
3
4
8
7
6
5
GND
EN
IN
IN
PG
SENSE
/FB
OUT
OUT
D OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND
GND
GND
NC
NC
EN
NC
IN
IN
IN
PG
NC
NC
FB
NC
SENSE
OUT
OUT
NC
NC
PW PACKAGE
(TOP VIEW)
SENSE Fixed voltage options only
(TPS7133, TPS7148, and TPS7150)
FB Adjustable version only (TPS7101)
TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q
TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS
SLVS092F NOVEMBER 1994 REVISED JANUARY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
0.1
0.05
0
0
0.05 0.1 0.15 0.2 0.25 0.3
Dropout V
oltage V
0.15
0.2
0.25
0.35 0.4 0.45 0.5
IO Output Current A
TA = 25
C
TPS7148
TPS7150
TPS7133
Figure 1. Dropout Voltage Versus Output Current
Power good (PG) reports low output voltage and can be used to implement a power-on reset or a low-battery
indicator.
The TPS71xx is offered in 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version
(programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2%
over line, load, and temperature ranges (3% for adjustable version). The TPS71xx family is available in PDIP
(8 pin), SO (8 pin), and TSSOP (20-pin) packages. The TSSOP has a maximum height of 1.2 mm.
AVAILABLE OPTIONS
TJ
OUTPUT VOLTAGE
(V)
PACKAGED DEVICES
CHIP FORM
TJ
MIN
TYP
MAX
SMALL OUTLINE
(D)
PLASTIC DIP
(P)
TSSOP
(PW)
(Y)
4.9
5
5.1
TPS7150QD
TPS7150QP
TPS7150QPW
TPS7150Y
4.75
4.85
4.95
TPS7148QD
TPS7148QP
TPS7148QPW
TPS7148Y
40
C to 125
C
3.23
3.3
3.37
TPS7133QD
TPS7133QP
TPS7133QPW
TPS7133Y
Adjustable
1.2 V to 9.75 V
TPS7101QD
TPS7101QP
TPS7101QPW
TPS7101Y
The D and PW packages are available taped and reeled. Add R suffix to device type (e.g., TPS7150QDR). The TPS7101Q is
programmable using an external resistor divider (see application information). The chip form is tested at 25
C.
TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q
TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS
SLVS092F NOVEMBER 1994 REVISED JANUARY 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TPS7133, TPS7148, TPS7150 (fixed-voltage options)
Capacitor selection is nontrivial. See application information section
for details.
SENSE
PG
OUT
OUT
9
8
6
10
IN
IN
IN
EN
GND
3
2
1
20
15
14
13
VI
0.1
F
PG
CSR
VO
10
F
+
TPS71xx
CO
Figure 2. Typical Application Configuration
TPS71xx chip information
These chips, when properly assembled, display characteristics similar to the TPS71xxQ. Thermal compression
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with
conductive epoxy or a gold-silicon preform.
(6)
(4)
(3)
(7)
(2)
(1)
GND
FB
OUT
PG
IN
EN
TPS71xx
80
92
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4
4 MILS MINIMUM
TJmax = 150
C
TOLERANCES ARE
10%.
ALL DIMENSIONS ARE IN MILS.
(6)
(7)
(2)
(5)
(4)
(3)
(1)
SENSE Fixed voltage options only (TPS7133, TPS7148,
and TPS7150)
FB Adjustable version only (TPS7101)
BONDING PAD ASSIGNMENTS
SENSE
(5)
NOTE A: For most applications, OUT and SENSE should
be tied together as close as possible to the device;
for other implementations, refer to SENSE-pin
connection discussion in the Applications
Information section of this data sheet.
TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q
TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS
SLVS092F NOVEMBER 1994 REVISED JANUARY 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
_
+
Vref = 1.178 V
OUT
SENSE /FB
EN
IN
GND
R1
R2
PG
_
+
TPS7101
TPS7133
TPS7148
TPS7150
DEVICE
UNIT
R1
R2
0
420
726
756
233
233
233
k
k
k
RESISTOR DIVIDER OPTIONS
Switch positions are shown with EN low (active).
For most applications, SENSE should be externally connected to OUT as close as possible to the device. For other implementations, refer to
SENSE-pin connection discussion in Applications Information section.
NOTE A: Resistors are nominal values only.
1.12 V
MOS transistors
Bilpolar transistors
Diodes
Capacitors
Resistors
COMPONENT COUNT
464
41
4
17
76
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range
, V
I
, PG, SENSE, EN
0.3 V to 11 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
2 A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation
See Dissipation Rating Tables 1 and 2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
55
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 FREE-AIR TEMPERATURE (see Figure 3)#
PACKAGE
TA
25
C
DERATING FACTOR
TA = 70
C
TA = 125
C
PACKAGE
A
POWER RATING
ABOVE TA = 25
C
A
POWER RATING
A
POWER RATING
D
725 mW
5.8 mW/
C
464 mW
145 mW
D
P
||
725 mW
1175 mW
5.8 mW/ C
9.4 mW/
C
464 mW
752 mW
145 mW
235 mW
PW||
700 mW
5.6 mW/
C
448 mW
140 mW
DISSIPATION RATING TABLE 2 CASE TEMPERATURE (see Figure 4)#
PACKAGE
TC
25
C
DERATING FACTOR
TC = 70
C
TC = 125
C
PACKAGE
C
POWER RATING
ABOVE TC = 25
C
C
POWER RATING
C
POWER RATING
D
P
2188 mW
2738 mW
17.5 mW/
C
21 9 mW/
C
1400 mW
1752 mW
438 mW
548 mW
P
PW||
2738 mW
4025 mW
21.9 mW/
C
32.2 mW/
C
1752 mW
2576 mW
548 mW
805 mW
# Dissipation rating tables and figures are provided for maintenance of junction temperature at or below
absolute maximum temperature of 150
C. For guidelines on maintaining junction temperature within
recommended operating range, see the Thermal Information section.
|| Refer to Thermal Information section for detailed power dissipation considerations when using the TSSOP packages.
TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q
TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS
SLVS092F NOVEMBER 1994 REVISED JANUARY 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Figure 3
1200
800
400
0
25
50
75
100
Maximum Continuous Dissipation mW
DISSIPATION DERATING CURVE
vs
FREE-AIR TEMPERATURE
125
150
1400
1000
600
200
PW and PWP
Package
R
JA = 178
C/W
P
D
TA Free-Air Temperature
C
P Package
R
JA = 106
C/W
D Package
R
JA = 172
C/W
Figure 4
2400
1600
800
0
25
50
75
100
Maximum Continuous Dissipation mW
3200
4000
DISSIPATION DERATING CURVE
vs
CASE TEMPERATURE
4800
125
150
4400
3600
2800
2000
1200
400
PW Package
R
JC = 31
C/W
P
D
TC Case Temperature
C
D Package
R
JC = 57
C/W
P Package
R
JC = 46
C/W
Dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute maximum temperature of 150
C.
For guidelines on maintaining junction temperature within recommended operating range, see the Thermal Information section.
recommended operating conditions
MIN
MAX
UNIT
TPS7101Q
2.5
10
Input voltage VI
TPS7133Q
3.77
10
V
Input voltage, VI
TPS7148Q
5.2
10
V
TPS7150Q
5.33
10
High-level input voltage at EN, VIH
2
V
Low-level input voltage at EN, VIL
0.5
V
Output current range, IO
0
500
mA
Operating virtual junction temperature range, TJ
40
125
C
Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage at the
maximum specified load range. Since dropout voltage is a function of output current, the usable range can be extended for lighter loads. To
calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load)
Because the TPS7101 is programmable, rDS(on) should be used to calculate VDO before applying the above equation. The equation for calculating
VDO from rDS(on) is given in Note 2 in the electrical characteristics table. The minimum value of 2.5 V is the absolute lower limit for the
recommended input voltage range for the TPS7101.
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