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FEATURES
DESCRIPTION
APPLICATIONS
GND
EN
NR
IN
OUT
V
IN
V
OUT
Optional
Optional
Optional
Typical Application Circuit for Fixed-Voltage Versions
DBV PACKAGE
SOT23
(TOP VIEW)
IN
GND
EN
NR/FB
OUT
1
2
3
4
5
TPS731xx
TPS73101, TPS73115, TPS73118
TPS73125, TPS73130, TPS73132
TPS73133, TPS73150
SBVS034E SEPTEMBER 2003 REVISED SEPTEMBER 2004
Cap-Free, NMOS, 150mA Low Dropout Regulator
with Reverse Current Protection
Stable with No Output Capacitor or Any Value
The TPS731xx family of low-dropout (LDO) linear
or Type of Capacitor
voltage regulators uses a new topology: an NMOS
pass element in a voltage-follower configuration. This
Input Voltage Range of 1.7V to 5.5V
topology is stable using output capacitors with low
Ultralow Dropout Voltage: 30mV Typ
ESR, and even allows operation without a capacitor.
Excellent Load Transient Response--with or
It also provides high reverse blockage (low reverse
without Optional Output Capacitor
current) and ground pin current that is nearly constant
over all values of output current.
New NMOS Topology Provides Low Reverse
Leakage Current
The TPS731xx uses an advanced BiCMOS process
to yield high precision while delivering very low
Low Noise: 30V
RMS
Typ (10kHz to 100kHz)
dropout voltages and low ground pin current. Current
0.5% Initial Accuracy
consumption, when not enabled, is under 1A and
1% Overall Accuracy over Line, Load, and
ideal for portable applications. The extremely low
Temperature
output noise (30V
RMS
with 0.1F C
NR
) is ideal for
powering VCOs. These devices are protected by
Less Than 1A Max I
Q
in Shutdown Mode
thermal shutdown and foldback current limit.
Thermal Shutdown and Specified Min/Max
Current Limit Protection
Available in Multiple Output Voltage Versions
Fixed Outputs of 1.2V, 1.5V, 1.8V, 2.5V, 3.0V,
3.3V, and 5.0V
Adjustable Outputs From 1.20V to 5.5V
Custom Outputs Available
Portable/Battery-Powered Equipment
Post-Regulation for Switching Supplies
Noise-Sensitive Circuitry such as VCOs
Point of Load Regulation for DSPs, FPGAs,
ASICs, and Microprocessors
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 20032004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
TPS73101, TPS73115, TPS73118
TPS73125, TPS73130, TPS73132
TPS73133, TPS73150
SBVS034E SEPTEMBER 2003 REVISED SEPTEMBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
SPECIFIED
PACKAGE-LEAD
PACKAGE
ORDERING
PRODUCT
V
OUT
(1)
TEMPERATURE
TRANSPORT MEDIA,
(DESIGNATOR)
(2)
MARKING
NUMBER
RANGE
QUANTITY
TPS73101DBVT
Tape and Reel, 250
Adjustable
TPS73101
SOT23-5 (DBV)
-40
C to +125
C
PWYQ
or 1.2V
(3)
TPS73101DBVR
Tape and Reel, 3000
TPS73115DBVT
Tape and Reel, 250
TPS73115
1.5V
SOT23-5 (DBV)
-40
C to +125
C
T31
TPS73115DBVR
Tape and Reel, 3000
TPS73118DBVT
Tape and Reel, 250
TPS73118
1.8V
SOT23-5 (DBV)
-40
C to +125
C
T32
TPS73118DBVR
Tape and Reel, 3000
TPS73125DBVT
Tape and Reel, 250
TPS73125
2.5V
SOT23-5 (DBV)
-40
C to +125
C
PHWI
TPS73125DBVR
Tape and Reel, 3000
TPS73130DBVT
Tape and Reel, 250
TPS73130
3.0V
SOT23-5 (DBV)
-40
C to +125
C
T33
TPS73130DBVR
Tape and Reel, 3000
TPS73132DBVT
Tape and Reel, 250
TPS73132
3.2V
SOT23-5 (DBV)
-40
C to +125
C
T52
TPS73132DBVR
Tape and Reel, 3000
TPS73133DBVT
Tape and Reel, 250
TPS73133
3.3V
SOT23-5 (DBV)
-40
C to +125
C
T34
TPS73133DBVR
Tape and Reel, 3000
TPS73150DBVT
Tape and Reel, 250
TPS73150
5.0V
SOT23-5 (DBV)
-40
C to +125
C
T35
TPS73150DBVR
Tape and Reel, 3000
(1)
Custom output voltages from 1.3V to 4V in 100mV increments are available on a quick-turn basis for prototyping. Minimum order
quantities apply; contact factory for details and availability.
(2)
For the most current specification and package information, refer to the Package Option Addendum located at the end of this datasheet.
(3)
For fixed 1.2V operation, tie FB to OUT.
over operating junction temperature range unless otherwise noted
(1)
TPS731xx
UNIT
V
IN
range
-0.3 to 6.0
V
V
EN
range
-0.3 to 6.0
V
V
OUT
range
-0.3 to 5.5
V
Peak output current
Internally limited
Output short-circuit duration
Indefinite
Continuous total power dissipation
See Dissipation Ratings Table
Junction temperature range, T
J
-55 to +150
C
Storage temperature range
-65 to +150
C
ESD rating, HBM
2
kV
ESD rating, CDM
500
V
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics
is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
2
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POWER DISSIPATION RATINGS
(1)
ELECTRICAL CHARACTERISTICS
TPS73101, TPS73115, TPS73118
TPS73125, TPS73130, TPS73132
TPS73133, TPS73150
SBVS034E SEPTEMBER 2003 REVISED SEPTEMBER 2004
DERATING FACTOR
T
A
25
C
T
A
= 70
C
T
A
= 85
C
BOARD
PACKAGE
R
JC
R
JA
ABOVE T
A
= 25
C
POWER RATING
POWER RATING
POWER RATING
Low-K
(2)
DBV
64
C/W
255
C/W
3.9mW/
C
390mW
215mW
155mW
High-K
(3)
DBV
64
C/W
180
C/W
5.6mW/
C
560mW
310mW
225mW
(1)
See Power Dissipation in the Applications section for more information related to thermal design.
(2)
The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2-ounce copper traces on top
of the board.
(3)
The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on the top and bottom of the board.
Over operating temperature range (T
J
= -40
C to +125
C), V
IN
= V
OUT(nom)
+ 0.5V
(1)
, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
=
0.1F, unless otherwise noted. Typical values are at T
J
= 25
C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
IN
Input voltage range
(1)
1.7
5.5
V
V
FB
Internal reference (TPS73101)
T
J
= 25
C
1.198
1.20
1.210
V
Output voltage range (TPS73101)
V
FB
5.5 - V
DO
V
Nominal
T
J
= 25
C
-0.5
+0.5
V
OUT
Accuracy
(1)
%
V
OUT
+ 0.5V
V
IN
5.5V;
V
IN
, I
OUT
, and T
-1.0
0.5
+1.0
10 mA
I
OUT
150mA
V
OUT
%/
V
IN
Line regulation
(1)
V
OUT(nom)
+ 0.5V
V
IN
5.5V
0.01
%/V
1mA
I
OUT
150mA
0.002
V
OUT
%/
I
OUT
Load regulation
%/mA
10mA
I
OUT
150mA
0.0005
Dropout voltage
(2)
V
DO
I
OUT
= 150mA
30
100
mV
(V
IN
= V
OUT
(nom) - 0.1V)
Z
O
(DO)
Output impedance in dropout
1.7 V
V
IN
V
OUT
+ V
DO
0.25
I
CL
Output current limit
V
OUT
= 0.9
V
OUT(nom)
150
360
500
mA
I
SC
Short-circuit current
V
OUT
= 0V
200
mA
I
REV
Reverse leakage current
(3)
(-I
IN
)
V
EN
0.5V, 0V
V
IN
V
OUT
0.1
10
A
I
OUT
= 10mA (I
Q
)
400
550
I
GND
Ground pin current
A
I
OUT
= 150mA
550
750
I
SHDN
Shutdown current (I
GND
)
V
EN
0.5V, V
OUT
V
IN
5.5
0.02
1
A
I
FB
FB pin current (TPS73101)
0.1
0.3
A
f = 100Hz, I
OUT
= 150 mA
58
Power-supply rejection ratio
PSRR
dB
(ripple rejection)
f = 10kHz, I
OUT
= 150 mA
37
C
OUT
= 10F, No C
NR
27
V
OUT
Output noise voltage
V
N
V
RMS
BW = 10Hz - 100kHz
C
OUT
= 10F, C
NR
= 0.01F
8.5
V
OUT
V
OUT
= 3V, R
L
= 30
t
STR
Startup time
600
s
C
OUT
= 1 F, C
NR
= 0.01 F
V
EN
(HI)
Enable high (enabled)
1.7
V
IN
V
V
EN
(LO)
Enable low (shutdown)
0
0.5
V
I
EN
(HI)
Enable pin current (enabled)
V
EN
= 5.5V
0.02
0.1
A
Shutdown
Temp increasing
160
T
SD
Thermal shutdown temperature
C
Reset
Temp decreasing
140
T
J
Operating junction temperature
-40
125
C
(1)
Minimum V
IN
= V
OUT
+V
DO
or 1.7V, whichever isgreater.
(2)
V
DO
is not measured for the TPS73115 (V
O(nom)
= 1.5V) since minimum V
IN
= 1.7V.
(3)
Fixed-voltage versions only; refer to the Applications section for more information.
3
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Servo
Error
Amp
Ref
Current
Limit
Thermal
Protection
Bandgap
NR
OUT
R
1
R
2
EN
GND
IN
R
1
+ R
2
= 80k
27k
8k
4MHz
Charge Pump
V
O
1.2V
1.5V
1.8V
2.5V
2.8V
3.0V
3.3V
5.0V
R
1
Short
23.2k
28.0k
39.2k
44.2k
46.4k
52.3k
78.7k
R
2
Open
95.3k
56.2k
36.5k
33.2k
30.9k
30.1k
24.9k
Table 1. Standard 1%
Resistor Values for
Common Output Voltages
NOTE: V
OUT
= (R
1
+ R
2
)/R
2
1.204;
R
1
R
2
19k
for best
accuracy.
Servo
Error
Amp
Ref
Current
Limit
4MHz
Charge Pump
Thermal
Protection
Bandgap
OUT
FB
R
1
R
2
EN
GND
IN
80k
8k
27k
TPS73101, TPS73115, TPS73118
TPS73125, TPS73130, TPS73132
TPS73133, TPS73150
SBVS034E SEPTEMBER 2003 REVISED SEPTEMBER 2004
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. Fixed Voltage Version
Figure 2. Adjustable Voltage Version
4
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PIN ASSIGNMENTS
DBV PACKAGE
SOT23
(TOP VIEW)
IN
GND
EN
NR/FB
OUT
1
2
3
4
5
TPS73101, TPS73115, TPS73118
TPS73125, TPS73130, TPS73132
TPS73133, TPS73150
SBVS034E SEPTEMBER 2003 REVISED SEPTEMBER 2004
TERMINAL FUNCTIONS
TERMINAL
SOT23
DESCRIPTION
NAME
(DBV)
PIN NO.
IN
1
Unregulated input supply
GND
2
Ground
EN
3
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown
mode. Refer to the Shutdown section under Applications Information for more details. EN can be connected to
IN if not used.
NR
4
Fixed voltage versions only--connecting an external capacitor to this pin bypasses noise generated by the
internal bandgap, reducing output noise to very low levels.
FB
4
Adjustable voltage version only--this is the input to the control loop error amplifier, and is used to set the
output voltage of the device.
OUT
5
Output of the regulator. There are no output capacitor requirements for stability.
5
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