UCC3952-1, UCC3952-2, UCC3952-3, UCC3952-4

Single Cell Lithium Ion Battery Protection IC

SLUS400D AUGUST 2000

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Protects Sensitive Lithium-Ion Cells From
Overcharging and Over-Discharging

Dedicated for One-Cell Applications

Integrated Low-Impedance MOSFET Switch
and Sense Resistor

Precision Trimmed Overcharge and
Overdischarge Voltage Limits

Extremely Low Power Drain

3-A Current Capacity

Overcurrent and Short-Circuit Protection

Reverse Charger Protection

Thermal Protection

description

The UCC3952 monolithic BiCMOS lithiumion
battery protection circuit increases the useful
operating life of a one-cell rechargeable battery
pack. Cell protection features include internally
trimmed charge and discharge voltage limits,
discharge current limit with a delayed shutdown,
and an ultra-low-current sleep mode state when
the cell is discharged. Additional features include
an on-chip MOSFET for reduced external compo-
nent count and a charge pump for reduced power
losses while charging or discharging a low-cell-
voltage battery pack. This protection circuit
requires one external capacitor and can operate
and safely shut down in a short circuit condition.

2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TCLK

BNEG
BNEG
BNEG
BNEG
BNEG
BNEG

PACK+
CBPS
NC
PACK
PACK
PACK
PACK
PACK

PW PACKAGE

(TOP VIEW)

DP PACKAGE

(TOP VIEW)

TCLK

NC
NC

SUB
SUB

BNEG
BNEG
BNEG

PACK+
CBPS
NC
SUB
SUB
PACK
PACK
PACK

UCC3952-1, UCC3952-2, UCC3952-3, UCC3952-4

Single Cell Lithium Ion Battery Protection IC

SLUS400D AUGUST 2000

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage (PACK+ to BNEG)

7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum forward voltage (PACK+ to PACK)

16 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum reverse voltage (where PACK+ to BNEG = 5V)

8 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum cell continuous charge current

3 A

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Junction temperature, T

C to 150

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage Temperature range, T

stg

C to 150

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Data Book for thermal limitations and

considerations of packages. All voltages are referenced to GND.

electrical characteristics, T

= 20

C to 70

C, all voltages are with respect to BNEG (unless

otherwise stated)

state transition threshold

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

UCC39521

4.15

4.20

4.25

Normal to overcharge voltage

UCC39522

4.20

4.25

4.30

V(OV)

Normal to overcharge voltage

UCC39523

4.25

4.30

4.35

UCC39524

4.30

4.35

4.40

UCC39521

3.85

3.90

3.95

Overcharge to normal recovery

UCC39522

3.90

3.95

4.00

V(OVR)

Overcharge to normal recovery
voltage

UCC39523

3.95

4.00

4.05

UCC39524

4.00

4.05

4.10

V(UV)

Normal to undercharge

2.25

2.35

2.45

V(UVR)

Undercharge to normal recovery

2.55

2.65

2.75

td(OD)

Overcharge delay time

short circuit protection

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

I(THLD)

Discharge current limit

PACK+ = 3.7 V

3.0

6.0

td(DLY)

Discharge current delay

PACK+ = 3.7 V, II = 6 A

3.0

R(RESET)

Discharge current reset resistance

PACK+ = 3.7 V

7.5

bias

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

IDD

Supply current

V(UV) < V(PACK) < V(OV)

IDD(OV)

Operating supply current in overvoltage

V(OV) < V(PACK)

I(SD)

Shutdown current

V(PACK) = 2.0 V

2.5

V(min)

Minimum cell voltage when all circuits are fully
functional

1.7

td(OV)

Overvoltage delay time

UCC3952-1, UCC3952-2, UCC3952-3, UCC3952-4

Single Cell Lithium Ion Battery Protection IC

SLUS400D AUGUST 2000

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

electrical characteristics, T

= 20

C to 70

C, all voltages are with respect to BNEG (unless

otherwise stated) (continued)

FET switch

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Voltage at PACK

PACK+ > VOV ,
I(SWITCH) = 1 mA to 2 A,
Battery overcharged state switch permits discharge
current only.

100

400

V(PACK)

Voltage at PACK

PACK+ = 2.5V,
I(SWITCH) = 1 mA to 2 A,
Battery overdischarged state switch permits charge
current only.

600

100

RON

Series resistance of the device

PACK+ = 2.5 V,
In normal mode (when not in OV or UV). This value
includes package and bondwire resistance.

thermal shutdown

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

T(SD)

Thermal shutdown temperature (see Note 2)

135

NOTE 2: This parameter is ensured by design and is not production tested.

detailed description

pin descriptions

BNEG

Connect the negative terminal of the battery to this pin.

PACK+

Connect to the positive terminal of the battery. This pin is available to the user.

CBPS

This power supply bypass pin is connected to PACK+ through an internal 3-k

resistor. An external 0.1-

capacitor must be connected between this pin and BNEG.

PACK

The negative terminal of the battery pack (negative terminal available to the user). The internal FET switch
connects this terminal to the BNEG terminal to give the battery pack user appropriate access to the battery. In
an overcharged state, only discharge current is permitted. In an overdischarged state, only charge current is
permitted.

SUB (DP Package Only)

Do not connect. These pins must be electrically isolated from all other pins. The SUB pins may be soldered to
an isolated copper pad for heatsinking. However, most applications do not require heatsinking.

TCLK

Production test mode pin. This pin is used to provide a high-frequency clock to the IC during production testing.
In an application, this pin is left unconnected or tied to BNEG.

UCC3952-1, UCC3952-2, UCC3952-3, UCC3952-4

Single Cell Lithium Ion Battery Protection IC

SLUS400D AUGUST 2000

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

APPLICATION INFORMATION

PUMP

TDLS

1mS

SETD

RST

SYSTEM

CLOCK

GENERATOR

SEL

MUX

UVR

OVR

THRESHOLD

COMPARATOR

THERMAL

SHUTDOWN

50mV

1.5V

PACK+

CBPS

TCLK

BNEG

PACK

N/C

DEL

1SEC

DEL

10mS

STATE

MACHINE

LOGIC

CLK

Figure 1. Detailed Block Diagram

battery voltage monitoring

The battery cell voltage is sampled every 8 ms by connecting a resistor divider across it and comparing the
resulting voltage to a precision internal reference voltage. Under normal conditions (cell voltage is below
overvoltage threshold and above undervoltage threshold), the UCC3952 consumes less than 10

A of current

and the internal MOSFET is fully turned on with the aid of a charge pump.

When the cell voltage falls below the undervoltage threshold for two consecutive samples, the IC disconnects
the load from the battery pack and enters a super-low-power mode. The pack remains in this state until it detects
the application of a charger, at which point charging is enabled. The requirement of two consecutive readings
below the undervoltage threshold filters out momentary drops in cell voltage due to load transients, preventing
nuisance trips.

If the cell voltage exceeds the overvoltage threshold for 1 second, charging is disabled; however, discharge
current is still allowed. This feature of the IC is explained further in the

controlled charge/discharge mode section

of this document.

UCC3952-1, UCC3952-2, UCC3952-3, UCC3952-4

Single Cell Lithium Ion Battery Protection IC

SLUS400D AUGUST 2000

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

APPLICATION INFORMATION

overcurrent monitoring and protection

Discharge current is continuously monitored via an internal sense resistor. In the event of excessive current,
an overcurrent condition is declared if the high current (over 3 A) persists for over 1 ms. This delay allows for
charging of the system bypass capacitors without tripping the overcurrent protection. A 0.1-

F capacitor on the

CBPS pin provides momentary holdup for the IC to assure proper operation in the event that a hard short
suddenly pulls the cell voltage below the minimum operating voltage.

Once an overcurrent condition has been declared, the internal MOSFET turns off. To return the device to normal
operation, the UCC3952 requires a load impedance greater than 7.5 M

across PACK+ to PACK. This

impedance is typically achieved by removing the battery pack from the system. At this point, the pack returns
to its normal state of operation.

controlled charge/discharge mode

When the chip senses an overvoltage condition, it prevents any additional charging, but allows discharge. This
is accomplished by activating a linear control loop, which controls the gate of the MOSFET based on the
differential voltage across its drain-to-source terminals. The linear loop attempts to regulate the differential
voltage across the MOSFET to 100 mV. When a light load is applied to the part, the loop adjusts the impedance
of the MOSFET to maintain 100 mV across it. As the load increases, the impedance of the MOSFET is
decreased to maintain the 100-mV control. At heavy loads (still below the overcurrent limit), the loop does not
maintain regulation and drives the gate of the MOSFET to the battery voltage (not the charge-pump output
voltage). The MOSFET R

DS(on)

in the overvoltage state is higher than RDS(on) during normal operation. The

voltage drop (and associated power loss) across the internal MOSFET in this mode of operation is still
significantly lower than the typical solution of two external back-to-back MOSFETs, where the body diode is
conducting.

When the chip senses an undervoltage condition, it disconnects the load from the battery pack and shuts itself
down to minimize current drain from the battery. Several circuits remain powered and detect placement of the
battery pack into a charger. Once the charger presence is detected, the linear loop is activated and the chip
allows charging current into the battery. This linear control mode of operation is in effect until the battery voltage
reaches a level of V

UVR

, at which time normal operation is resumed.

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components.

In order to minimize risks associated with the customer's applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI's publication of information regarding any third
party's products or services does not constitute TI's approval, warranty or endorsement thereof.

2000, Texas Instruments Incorporated

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