TLP554
1 2002-07-09
TOSHIBA PHOTOCOUPLER GaAlAs IRED & PHOTO-IC
T L P 5 5 4
ISOLATED LINE RECEIVER
SIMPLEX/MULTIPLEX DATA TRANSMISSION
COMPUTER-PERIPHERAL INTERFACE
MICROPROCESSOR SYSTEM INTERFACES
DIGITAL ISOLATION FOR A/D,D/A CONVERSION
The TOSHIBA TLP554 a photocoupler which combines a GaAlAsIRED as
the emitter and an integrated high gain,high speed photodetector.
The output of the detector circuit is an open collector,Schottky Clamped
transistor.
A Faraday shield integrated on the photodetector chip reduces the effects of
capacitive coupling between the input LED emitter and the high gain stages
of the detector. This provides an effective common mode transient immunity
of 1000V/us.
l Input Current
Threshold
: IF=5mA(Max.)
l Switching Speed
: 10MBd(TYP,@NRZ)
l Common mode transient immunity
: 1000V/us(Min)
l Guaranteed PerformanceOverTemperature
: 0~70C
l Isolation Voltage
: 2500Vrms(Min)
l UL Recognized
:UL1577,File No.E67349
TRUTH TABLE(Positive Logic)
INPUT ENABLE OUTPUT
H H L
L H H
H L H
L L H
SCHEMATIC
V
CC
GND
ICC
IO
IF
2
5
6
V
O
VF
3
SHIELD
7
V
E
8
I
E
A 0.1
mF bypass capacitor must be connected
Between pins 8 and 5.(See Note 1)
PIN CONFIGURATION (TOP VIEW)
1:NC
2:ANODE
3:CATHODE
4:N.C.
5:GND
6:V
O
(OUTPUT)
7:V
E
(ENABLE)
8:V
CC
1
2
3
4
5
6
7
8
V
CC
GND
SHIELD
Unit: mm
JEDEC
TOSHIBA 11-10C4
Weight: 0.54 g
TLP554
2 2002-07-09
RECOMMENDED OPERATING CONDITIONS
CHARACTERISTIC SYMBOL
MIN.
TYP.
MAX.
UNIT
Low Level input Voltage
VFL
-3
0
1.0 V
High Level input current
IFH
6.3*
20 mA
Supply Voltage
VCC
4.5
5
5.5 V
High-Level Enable Voltage
VEH
2.0
VCC V
Low-Level Enable Voltage
VEL
0
0.8 V
Fan Out(TTL Load)
N
8
Operating Temperature
Topr
0
70 C
*6.3mA condition permits at least 20% CTR degradation
Initial switching threshold is 5.0mA or less.
MAXIMUM RATINGS
(Ta
=
=
=
= 25C)
CHARACTERISTIC SYMBOL
RATING
UNIT
Forward Current
I
F
20 mA
LE
D
Reverse Voltage
V
R
5 V
Output Current
IO
25 mA
Output Voltage
VO
-0.5~7
V
Supply Voltage
(Note 2)
VCC
7
V
Enable Voltage
(Note 3)
VE
5.5
V
DE
T
E
CT
OR
Output Power Dissipation
PO
40
mW
Storage Temperature Range
T
stg
-55~125 C
Operating Temperature Range
T
opr
-40~85
C
Lead Soldering Temperature (10 s)
(Note 4)
T
sol
260 C
Isolation Voltage (AC, 1 minute, R.H. 60%)
(Note 5)
BV
S
2500
Vrms
(Note 1) The V
CC
supply voltage to each TLP554 isolator must be bypassed by a 0.1
mF
capacitor or larger.This can be either a ceramic or solid tantalum capacitor with
good high frequency characteristic and should be connected as close as possible to
the package V
CC
and GND pins each device.
(Note 2) 1 Minute Maximum.
(Note 3) Not to exceed VCC by more than 500mV.
(Note 4) 2mm below seating plane.
(Note 5) Device considered a two-terminal device :Pins 1,2,3 and 4 shorted together,and Pins 5,
6,7 and 8 shorted together.
TLP554
3 2002-07-09
ELECTRICAL CHARACTERISTICS
(Ta
=
=
=
= 0
~
70C , VCC=4.5
~
5.5V , VFL
1.0V)
CHARACTERISTIC SYMBOL TEST
CONDITION MIN.
TYP.*
MAX.
UNIT
Forward Voltage
V
F
I
F
= 10 mA , Ta=25C
1.65
1.80
V
Temperature Coefficient of Forward
Voltage
VF/Ta I
F
= 10 mA ,
-2.0 mV/C
Input Reverse Current
I
R
V
R
=5V, Ta=25C
10 mA
Input Capacitance
C
T
V = 0 , f = 1MHz , Ta=25C
45 pF
Ta
=0~70C
10 250
High-Level Output Current
IOH
VF = 1.0V
VO = 5.5V
VE = 2.0V
Ta=25C
0.5 10
mA
Low-Level Output Voltage
VOL
IF=5mA , VE=2.0V , IOL=13mA
0.4 0.6
V
High Level input current
IFH
IOL=13mA , VE=2.0V , VOL=0.6V
5 mA
High Level
ICCH IF=0mA
7 15
Supply Current
Low Level
ICCL
VCC=5.5V
VE=0.5V
IF=10mA
12
19
mA
High Level
IEH
VE=2.0V
-1.0
Enable Current
Low Level
IEL
VCC=5.5V
VE=0.5V
-1.6 -2.0
mA
High Level
VEH
(Note 6)
2.0
Enable Voltage
Low Level
VEL
0.8
V
Capacitance (Input-Output)
CS
VS=0 , f=1MHz , Ta=25
0.6
pF
Resistance (Input-Output)
RS
VS=500V , Ta=25 , R.H. 60%
510
10
10
14
W
(*)All typ.values are at Ta=25
C
(Note 6) No pull up resistor required as the device has an internal pull up resistor.
TLP554
4 2002-07-09
SWITCHING CHARACTERISTICS
(Ta
=
=
=
= 25C , V
CC
=5V)
CHARACTERISTIC SYMBOL
TEST
CIRCUIT
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
L
H tpLH
IF=7.5
0mA
60
120
Propagation Delay Time
H
L tpHL
RL=350
W
CL=15pF
IF=0
7.5mA
60
120
ns
Output Rise Time(10-90%)
tr
30
Output Fall Time(10-90%)
tf
1
IF=7.5
0 / 07.5mA
RL=350, CL=15pF
30
ns
tELH VE=0.5
3.0V
25
Enable Propagation Delay Time
tEHL
2
RL=350
W
CL=15pF
IF=7.5 mA
VE=3.0
0.5V
25
ns
Common Mode Transient
Immunity at Hight Level
Outout
CM
H
IF=0mA
VO(Min)=2.0V
1000
10000
Common Mode Transient
Immunity at Low Level
Outout
CM
L
3
VCM=400V
RL=350
W
(Note 7)
IF=7.5mA
VO(Max)=0.8V
-1000
-10000
V/
ms
(Note 7) CM
H
The maximum tolerable rate of rise of the common mode voltage to ensure
the output will remain in the high state(i.e.,VOUT>2.0V)
CM
L
The maximum tolerable rate of fall of the common mode voltage to ensure
the output will remain in the low output state(i.e.,VOUT<0.8V)
Measured in volts per microsecond(V/
ms).
(Note 8) Maximum electrostatic discharge voltage for any pins:180V(C=200pF,R=0)
TLP554
5 2002-07-09
IF=7.5mA
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