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Электронный компонент: W83L518D

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Winbond
Integrated Media Reader
W83L518D
Datasheet
W83L518D
Data Sheet Revision History
Pages
Dates
Version
Version
on Web
Main Contents
1
02/Jul.
1.0
1.0
1
st
Release
2
3
4
5
6
7
8
Please note that all data and specifications are subject to change without notice. All the
trademarks of products and companies mentioned in this data sheet belong to their
respective owners.

LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal
injury. Winbond customers using or selling these products for use in such applications do
so at their own risk and agree to fully indemnify Winbond for any damages resulting from
such improper use or sales.
CONTENT
1
GENERAL DESCRIPTION ....................................................................................................... 1
2
FUNCTIONS ...........................................................................................................................2
2.1
G
ENERAL
...................................................................................................................................2
2.2
S
MART
C
ARD
I
NTERFACE
.............................................................................................................. 2
2.3
M
EMORY
S
TICK
I
NTERFACE
............................................................................................................2
2.4
SD
M
EMORY
C
ARD
I
NTERFACE
....................................................................................................... 2
2.5
P
ACKAGE
..................................................................................................................................2
3
PIN CONFIGURATION FOR W83L518D ...................................................................................3
4
PIN DESCRIPTION .................................................................................................................4
4.1
B
US
I
NTERFACE
...........................................................................................................................4
4.2
S
MART
C
ARD
I
NTERFACE
P
INS
....................................................................................................... 5
4.3
M
EMORY
S
TICK
I
NTERFACE
/SD
M
EMORY
I
NTERFACE
P
INS
....................................................................6
4.4
G
ENERAL
-P
URPOSE
I/O
P
INS
.........................................................................................................7
4.5
C
RYSTAL AND
P
OWER
P
INS
..........................................................................................................7
5
GENERAL-PURPOSE I/O PORTS (GPIO) .................................................................................8
6
CONFIGURATION REGISTER ............................................................................................... 10
6.1
P
LUG AND
P
LAY
C
ONFIGURATION
................................................................................................. 10
6.2
C
OMPATIBLE
P
N
P...................................................................................................................... 10
6.2.1 Extended Function Register............................................................................................... 10
6.2.2 Extended Functions Enable Register (EFER) ...................................................................... 11
6.2.3 Extended Function Index Register (EFIR), Extended Function Data Register (EFDR) .............. 11
6.3
C
ONFIGURATION
S
EQUENCE
......................................................................................................... 11
6.3.1 Software programming example.......................................................................................... 12
6.4
G
LOBAL
R
EGISTERS
................................................................................................................... 12
6.5
L
OGICAL
D
EVICE
0
(S
MART
C
ARD
I
NTERFACE
) ................................................................................. 15
6.6
L
OGICAL
D
EVICE
1
(M
EMORY
S
TICK
I
NTERFACE
)............................................................................... 15
6.7
L
OGICAL
D
EVICE
2
(GPIO) .......................................................................................................... 16
6.8
L
OGICAL
D
EVICE
3
(SD
M
EMORY
I
NTERFACE
) .................................................................................. 18
7
ORDERING INSTRUCTION.................................................................................................... 19
8
HOW TO READ THE TOP MARKING ..................................................................................... 19
9
PACKAGE DRAWING AND DIMENSIONS .............................................................................. 20
10
THE W83L518D SCHEMATIC............................................................................................. 22
W83L518D
The trademarks and intellectual property rights of Memory Stick belong to SONY Corporation
Publication Release Date:Jul. 2002
The trademarks and intellectual property rights of SD belong to SD GROUP
Revision 1.0
All trademarks and brand names belong to their respective owners
1
1 GENERAL DESCRIPTION
W83L518D is Winbond's innovative solution to a new class of storage devices for IA Noetebook, Desktop PC
and PC system-related products. It incorporates a security Application: Smart Card Interface and two most
promising compact storage interfaces: Memory Stick interface, and SD Memory Card/Multimedia Card
interface in IT era.
To cater boundless IT implementation possibilities, W83L518D can be configured to interface with host
through LPC bus. Base on the LPC interface, one Smart Card Interface port and two flash memory
interfaces - Memory Stick and SD Memory ports are provided. The kind of versatility allows user to design
very cost-effective products in a very flexible way.
The whole chip of W83L518D operates at voltage level of 3.3 V except Smart Card Interface port's I/O pins
that are at 5 V to be compatible with mainstream Smart Card implementations. Advanced power
management feature further optimizes power consumption whether in operation or in power down mode.
W83L518D comes as a 48-pin LQFP streamline package. Combining with powerful functions, effective
power management, and versatile configurability, this integrated media reader offers a perfect approach for
design of storage device of IT products.
The trademarks and intellectual property rights of Memory Stick belong to SONY Corporation. Information
check:
http://www.memorystick.org/
The trademarks and intellectual property rights of Secure Digital belong to SD Group. Information check:
http://www.sdcard.org/
W83L518D
The trademarks and intellectual property rights of Memory Stick belong to SONY Corporation
Publication Release Date:Jul. 2002
The trademarks and intellectual property rights of SD belong to SD GROUP
Revision 1.0
All trademarks and brand names belong to their respective owners
2
2 FUNCTIONS
2.1 General
q
LPC bus is compliant with LPC Spec. 1.01
q
LPC bus supports LDRQ# (LPC DMA), SERIRQ (serial IRQ)
q
Programmable configuration settings
q
48 MHz crystal inputs
q
PCICLK of 33 MHz is needed for LPC bus configuration
2.2 Smart Card Interface
q
ISO-7816 compliant
q
PC/SC T=0, T=1 compliant
q
16-byte transmitter FIFO and 16-byte receiver FIFO
q
FIFO threshold interrupt to optimize system performance
q
Programmable transmission clock frequency
q
Versatile baud rate configuration
q
UART-like register file structure
q
General-purpose C4, C8 channels

2.3 Memory Stick Interface
q
Memory Stick Standard Format Specifications ver. 1.3 compliant
q
Support interrupt polling transmission
q
Support FIFO threshold interrupt to optimize system performance
q
Automatic clock halt to prevent underrun/overrun
q
16 MHz interface clock

2.4 SD Memory Card Interface
q
SD Memory Card Specifications: Part 1 PHYSICAL LAYER SPECIFICATION Version 1.0 Compliant
q
Support interrupt polling transmission
q
Support FIFO threshold interrupt to leverage system performance
q
24 MHz interface clock

2.5 Package
q
48-pin LQFP