1
Features
Transformerless 2W to 4W conversion
Controls battery feed to line
Programmable line impedance
Programmable network balance impedance
Off-hook and dial pulse detection
Protects against GND short circuit
Programmable gain
Programmable constant current mode with
constant voltage fold over
Transformerless balanced ringing with
automatic ring trip circuit. No mechanical relay
Supports low voltage ringing
Line polarity reversal
On-hook transmission
Power down and wake up capability
Meter pulse injection
Ground Key detection
Applications
Line interface for:
PABX
Intercoms
Key Telephone Systems
Control Systems
Description
The Zarlink MT91610, with an external bipolar driver
(Figure 4), provides an interface between a switching
system and a subscriber loop. The functions
provided by the MT91610 include battery feed,
programmable constant current with constant
voltage fold over for long loops, 2W to 4W
conversion, off-hook and dial pulse detection, direct
balance ringing with built in ring tripping, unbalance
detection, user definable line and network balance
impedance's and gain, and power down and wake
up. The device is fabricated as a CMOS circuit in a
36 pin QSOP package.
Figure 1 - Functional Block Diagram
TD
RING
Tip Drive
Controller
Audio Gain & Network
Balance Circuit
2 W to 4 W
Conversion & Line
Impedance
Line
Reverse
Line Sense
Over-Current
Protection Circuit
Ring Drive
Controller
Loop Supervision
TIP
RC
VR
Z3
Z2
CP5
LR
V
E
E
G
N
D
V
D
D
C
P
3
C
P
2
S
H
K
V
R
E
F
GTX1
GTX0
VX
CP6
Driver
RV
RD
U
D
D
C
R
I
V
B
A
T
PD
ESI
ESE
CP4
CP7
C
P
1
Ringing
Controller
TF
RF
Z1
Package Information
MT91610AQ
36 Pin QSOP Package
-40
C to +85
C
MT91610
Programmable Ringing SLIC
Preliminary Information
DS5181
ISSUE 6
July 2001
MT91610
Preliminary Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
1
VDD
Positive supply rail, +5V.
2
TD
Tip Drive (Output). Controls the Tip transistor. Connects 330nF cap to GND.
3
TF
Tip Feed (Output). Connects to the Tip transistor and to TIP via the Tip feed resistor.
4
NC
No Connection. Left open.
5
Tip
Tip. Connects to the TIP lead of the telephone line.
6
VREF Reference Voltage (Input). Used to set the subscribers loop constant current. A 0.1uF cap
should be connected between this pin and GND for noise decoupling.
7
LR
Line Reverse (Input). This pin should be set to 0V for NORMAL polarity. Setting the pin to +5V
reverses the polarity of Tip and Ring.
8
Ring
Ring. Connects to the RING lead of the telephone line.
9
RF
Ring Feed (Output). Connects to the RING lead via the Ring feed resistor.
10
NC
No Connection. Left open.
11
RD
Ring Drive (Output). Controls the Ring transistor. Connects 330nF cap to GND.
12
CP1
CP1. A 100nF capacitor should be connected between this pin and pin 13.
13
CP2
CP2. A 220nF capacitor for loop stability is connected between this pin and pin 14.
14
CP3
CP3. A 220nF capacitor for loop stability is connected between this pin and pin 13.
15
CP4
CP4. A 100nF cap should be connected between this pin and GND.
16
ESE
External Signal Enable (Input). A logic '1' enables the MPI (Meter Pulse Input) to Tip / Ring.
This pin should be set to logic '0' when not used.
17
PD
Power Down (Input). A logic '1' power down the device. This pin should be set to logic '0' for
normal operation.
18
DCRI
DC voltage for Ringing Input (Input) The positive voltage supply for balance ringing. The
input DC voltage range is from 0V to +72V.
19
AGND Analog Ground. 4 Wire Ground, normally connected to system ground.
VX
VR
VREF
CP7
VEE
RING
RV
GTX0
LR
TIP
NC
RF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
36
35
34
33
32
31
30
29
28
27
26
25
24
23
TF
VDD
TD
NC
RD
CP1
CP2
CP3
SHK
VBAT
UD
RC
CP6
GTX1
ESI
Z3
CP4
ESE
PD
DCRI
15
16
17
18
22
21
20
19
CP5
Z1
Z2
AGND
Preliminary Information
MT91610
3
20
Z1
Line Impedance Node 1. A resistor of scaled value "k" is connected between Z1 and Z2. This
connection can not be left open circuit.
21
CP5
Line Impedance AC couple. A 330 nF cap must be connected between this pin and Z1 (pin
20).
22
Z2
Line Impedance Node 2. This is the common connection node between Z1 and Z3.
23
Z3
Line Impedance Node 3. A resistive or complex network of scaled value "k" is connected
between Z3 and Z2. This connection can not be left open circuit.
24
GTX0 Gain Node 0. This is the common node between Z3 and VX where resistors are connected to
set the 2W to 4W gain.
25
VX
Transmit Audio. 4W analog signal from the SLIC.
26
ESI
External Signal Input. 12 / 16 KHz signal input.
27
GTX1 Gain Node 1. The common node between VR and the audio input from the CODEC or
switching network where resistors are fitted to set the 4W to 2W gain.
28
VR
Receive Audio. 4W analog signal to the SLIC.
29
CP6
Ringing Cap. A 0.47uF cap should be connected between this pin and GND to filter out the
ringing signal.
30
RC
Ringing Control. An active high (+5V) on this pin will set up the DC feed and gain of the SLIC
to apply 20 Hz ringing. When low (0V) set the SLIC in normal constant current mode of
operation.
31
UD
UnBalance Detect. Logic high (+5V) indicates an offset current between Tip and Ring.
32
VBAT
VBAT. The negative battery supply, typically at -48V.
33
SHK
Switch Hook. This pin indicates the line state of the subscribers telephone. The output can also
be used for dial pulse monitoring. Logic high (+5V) indicates off hook condition.
34
CP7
Deglitching Cap. A 33nF should be connected between this pin and GND.
35
RV
Ringing Voltage. 20 Hz sinusoidal or square wave AC in for balance ringing.
36
VEE
Negative supply rail, -5V.
Pin Description (continued)
Pin #
Name
Description
Functional Description
Refer to Figure 4 for MT91610 components
designation.
The MT91610, with external bipolar transistors,
functions as an Analog Line SLIC for use in a 4 Wire
switched system. The SLIC performs all of the
BORSH functions while interfacing to a CODEC or
switching system.
2 Wire to 4 Wire Conversion
The SLIC performs 2 wire to 4 wire conversion by
taking the 4 wire signal from an analog switch or
voice CODEC, and converting it to a 2 wire
differential signal at Tip and Ring. The 2 wire signal
applied to tip and ring by the phone is converted to a
4 wire signal, which is the output from the SLIC to
the analog switch or voice CODEC.
Gain Control
It is possible to set the Transmit and Receive gains
by the selection of the appropriate external
components.
The gains can be calculated by the following
formulae:
2W to 4W gain
Gain 2 - 4 = 20 Log [ R8 / R7]
4W to 2W gain
Gain 4 - 2 = 20 Log [0.891 * [R10 / R9)]
MT91610
Preliminary Information
4
Impedance Programming
The MT91610 allows the designer to set the device's
impedance across TIP and RING, (Z
TR
), and
network balance impedance, (Z
NB
), separately with
external low cost components.
The impedance (Z
TR
) is set by R4, R5, while the
network balance, (Z
NB
), is set by R6, R8, (see Figure
4.)
The network balance impedance should be
calculated once the 2W - 4W gain has been set.
Line Impedance
For optimum performance, the characteristic
impedance of the line, (Z
o
), and the device's
impedance across TIP and RING, (Z
TR
), should
match. Therefore:
Z
o
= Z
TR
The relationship between Z
o
and the components
that set Z
TR
is given by the formula:
Z
o
/ ( Ra+Rb) = kZ
o
/ R4
where kZ
o
= R5
Ra = Rb
The value of k can be set by the designer to be any
value between 500 and 2000. R4 and R5 should be
greater than 100k
.
Network Balance Impedance
The network balance impedance, (Z
NB
), will set the
transhybrid loss performance for the circuit. The
transhybrid loss of the circuit depends on both the 4 -
2 Wire gain and the 2 - 4 Wire gain.
The method of setting the values for R6 (or Z6... it
can be a complex impedance) is given as below:
R6 = R7 * (R9 / R10) * 2.2446689 * ( Z
NB
/ Z
NB
+ Z
o
)
Please note that in the case of Z
o
not equal to Z
NB
(the THL compromized case) R6 is a complex
impedance. In the general case of Z
o
matched to
Z
NB
(the THL optimised case), R6 is just a single
resistor.
Loop Supervision
The Loop Supervision circuit monitors the state of
the phone line and when the phone goes "Off Hook"
the SHK pin goes high to indicate this state. This pin
reverts to a low state when the phone goes back "On
Hook" or if the loop resistance is too high (>2.3K
)
When loop disconnect dialling is being used, SHK
pulses to logic 0 indicate the digits being dialled.
This output should be debounced.
Constant Current Control & Voltage
Fold Over Mode
The SLIC employs a feedback circuit to supply a
constant feed current to the line. This design is
accomplished by sensing the sum of the voltages
across the feed resistors, Ra and Rb, and comparing
it to the input reference voltage, Vref, that
determines the constant current feed current.
By using a resistive divider network, (Figure 3), it is
possible to generate the required voltage to set the
loop current, I
LOOP
. This voltage can be calculated
using the following formula:
I
LOOP
= [V
DD
* G] * 3
(Ra +Rb)
where, G = R2 / (R1 + R2)
I
LOOP
is in Ampere.
R1= 200K
From Figure 3 with Ra = Rb = 100
For I
LOOP
= 20mA, R2 = 72.73 K
For I
LOOP
= 25mA, R2 = 100 K
For I
LOOP
= 30mA, R2 = 133.33 K
Figure 3 - Loop Setting
R2
**k
V
REF
6
MT91610
R1
+5V
C2
0.47uF
** See Figure 6
200K
Preliminary Information
MT91610
5
For convenience, a graph which plots the value of
R2 (K
) versus the approximated loop current is
shown in Figure 6. This graph implies the SLIC is
operating in constant current mode.
As +5V is used as the reference voltage to generate
the loop current, any noise on the +5V rail will
deteriorate the PSR (Power Supply Rejection)
parameter of the SLIC. It is therefore important to
decouple +5V to GND. A 0.1uF cap at Vref pin (pin6)
is recommended.
The MT91610 operating current mode is
recommended to be between 20mA and 30mA. The
device will automatically switch to voltage fold over
mode should an unexpected long loop situation
occur for a given programmed loop current. The
lowest operational current should be 16mA with
VBAT set at -48V. A typical Operating Current
versus Loop Resistance with VBAT at -48V is shown
in Figure 7. The actually loop current should settle to
within +/- 2 mA of the targeted value.
UD & Line Drivers Overcurrent
Protection
The Line Drivers control the external Battery Feed
circuit which provide power to the line and allows bi-
directional audio transmission.
The loop supervision circuitry provides bias to the
line drivers to feed a constant current. Overcurrent
protection is done by the following steps:
(A) External bipolar transistors to limit the current of
the NPN drivers to 50mA (Figure 5, Q14, Q15, R9,
R19).
(B) The local controller should monitor the
Unbalance Detection output (UD) for any extended
period of assertion (>5 seconds). In such case the
controller should power down the device by
asserting the PD pin, and poll the device every 5
seconds.
The UD output can be used to support GND START
LOOP in a PaBX operation. Reference MSAN-180
for details.
Please note that this UD output should be
disregarded and masked out if RC pin is active (ie
set to +5V).
Powering Up / Down Sequence
AGND is always connected
Powering Up: +5V, -5V, VBAT
PD to +5V for 100ms; PD to 0V
Powering Down: VBAT, -5V, +5V
Balanced Ringing & Automatic Ring
Tripping
Balanced Ringing is applied to the line by setting RC
(pin 30) to +5V and connecting the ringing signal
(20Hz) to RV (pin 35) as shown in Figure 4. A
1.2Vrms input will give approximately 60Vrms output
across Tip and Ring, sufficient for short loop SLIC
applications. The SLIC is capable of detecting an Off
Hook condition during ringing by filtering out the
large A.C. component. A 0.47uF cap should be
connected to pin CP6 (pin 29) to form such filter.
This filter allows a true Off Hook condition to be
monitored at SHK (pin 33). When an Off Hook
condition is detected by the SLIC, it will remove the
20Hz AC ringing voltage and revert to constant
current mode. The local controller will, however, still
need to deselect RC (set it to 0V).
The MT91610 supports short burst of ringing
cadence. A deglitching input (CP7) is provided to
ensure that the SHK pin is glitch free during the
assertion and de-assertion of RC. A 33nF cap should
be connected from this pin to GND.
A positive voltage source is required to be connected
to the DCRI pin (Figure 5) for normal Ringing
operation. The SLIC can perform ringing even with
the DCRI input connected to 0V, however, it does
require the VBAT to be lower than -48V (ie at -53V or
lower) and the 20Hz AC input should be a 2Vrms
square wave.
The MT91610 can also be used in applications
requiring unbalanced ringing using an external relay.
Reference MSAN-180 for details of this and
equations related to ringing.
Line Reversal
The MT91610 can deliver Line Reversal, which is
required in operation such as ANI, by simply setting
LR (pin 7) to +5V. The device transmission
parameters will cease during the reversal. The LR
(pin 7) should be set to 0V for all normal loop
operations.
PDF 
ZIP