P R E L I M I N A R Y
Z86116
CP95WRL0501
1
CP95WRL0501 (8/95)
P
RELIMINARY
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
Z86116
CMOS Z8
PN M
ODULATOR
W
IRELESS
C
ONTROLLER
ROM
RAM*
SPEED
Part (Kbytes) (Kbytes)
(MHz)
Z86116
1
124
12
FEATURES
GENERAL DESCRIPTION
* General-Purpose
s
18-Pin DIP and SOIC Packages
s
3.0- to 5.5-Volt Operating Range
s
Low-Power Consumption
s
0
to +70
C Temperature Range
s
Expanded Register File (ERF)
s
On-Chip PN Modulator for Spread Spectrum
Communications
s
12 Input/Output Lines (One with Comparator Input)
s
Vectored, Prioritized Interrupts With Programmable
Polarity
s
Analog Comparator
s
Two Programmable 8-Bit Counter/Timers Each with
Two 6-Bit Programmable Prescalers
s
Watch-Dog Timer (WDT)/Power-On Reset (POR)
s
On-Chip Oscillator that Accepts a RC, or External
Clock Drive
s
Low-Voltage Protection / Low-EMI Option
The Z86116 Wireless Controller is a member of the Z8
single-chip microcontroller family based on Zilog's 8-bit
microcontroller core. The Z86116 is designed with specific
features for wireless spread spectrum applications using
direct sequence pseudo-noise (PN) modulation.
Three address spaces, the Program Memory, Register
File, and Expanded Register File (ERF), support a wide
range of memory configurations. Through the ERF, the
designer has access to three additional control registers
that provide extra peripheral devices, I/O ports, and
register addresses.
For applications demanding powerful I/O capabilities, the
Z86116's dedicated input and output lines are grouped
into two ports, and are configurable under software control
to provide timing, status signals, or parallel I/O.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
V
CC
V
DD
Ground
GND
V
SS
P R E L I M I N A R Y
Z86116
CP95WRL0501
2
FUNCTIONAL DESCRIPTION
Port 3
Counter/
Timers (2)
Interrupt
Control
Two Analog
Comparators
Port 2
I/O
(Bit Programmable)
ALU
FLAG
Register
Pointer
Register File
144 x 8-Bit
VCC
GND
Input
Output
PN
Modulator
Prg. Memory
1024 x 8-Bit
Program
Counter
Time Base
Generator
RC
Machine Timing &
Instruction Control
WDT, POR
TM BASE
Functional Block Diagram
P R E L I M I N A R Y
Z86116
CP95WRL0501
3
18-Pin DIP/SOIC Pin Identification
FUNCTIONAL DESCRIPTION
(Continued)
1
2
9
3
4
5
6
7
8
18
17
16
15
14
13
12
11
10
P23
P22
TM BASE
P21
P20
GND
P36
P35
GND
P24
P25
P33
P26
P27
VCC
RC2
RC1
P31
Z86116
18-Pin DIP/SOIC Pin Configuration
No
Symbol
Function
Direction
1-4
P24-27
Port 2, Pins 4, 5, 6, 7
In/Output
5
V
CC
Power Supply
Input
6
RC2
RC Oscillator Clock
Output
7
RC1
RC Oscillator Clock
Input
8-9
P31, P33 Port 3, Pins 1, 3
Fixed Input
10
TM BASE Time Base Clock
Input
11
GND
Ground
12-13 P35-36
Port 3, Pins 5, 6
Fixed Output
14
GND
Ground
15-18 P20-23
Port 2, Pins 0, 1, 2, 3
In/Output
P R E L I M I N A R Y
Z86116
CP95WRL0501
4
ABSOLUTE MAXIMUM RATINGS
Symbol
Description
Min
Max
Units
V
CC
Supply Voltage*
0.3
+7.0
V
T
STG
Storage Temp
65
+150
C
T
A
Oper Ambient Temp
C
Notes:
* Voltage on all pins with respect to GND.
See Ordering Information
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for extended period
may affect device reliability.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to ground.
Positive current flows into the referenced pin (Test Load
Configuration).
+5V
From Output
Under Test
150 pF
9.1 K
2.1 K
Test Load Configuration
P R E L I M I N A R Y
Z86116
CP95WRL0501
5
DC ELECTRICAL CHARACTERISTICS
T
A
= 0
C to +70
C
Typical
Sym
Parameter
V
CC
Min
Max
@ 25
C
Units
Conditions
Notes
Max Input Voltage
3.0V
12
V
I
IN
250
A
5.5V
12
V
I
IN
250
A
V
CH
Clock Input High
3.0V
0.9 V
CC
V
CC
+0.3
2.4
V
Driven by External Clock Generator
Voltage
5.5V
0.9 V
CC
V
CC
+0.3
3.9
V
Driven by External Clock Generator
V
CL
Clock Input Low
3.0V
V
SS
0.3
0.2 V
CC
1.6
V
Driven by External Clock Generator
Voltage
5.5V
V
SS
0.3
0.2 V
CC
2.7
V
Driven by External Clock Generator
V
IH
Input High Voltage
3.0V
0.7 V
CC
V
CC
+0.3
1.8
V
5.5V
0.7 V
CC
V
CC
+0.3
2.8
V
V
IL
Input Low Voltage
3.0V
V
SS
0.3
0.2 V
CC
1.0
V
5.5V
V
SS
0.3
0.2 V
CC
1.5
V
V
OH
Output High Voltage
3.0V
V
CC
0.4
3.1
V
I
OH
= 2.0 mA
5.5V
V
CC
0.4
4.8
V
I
OH
= 2.0 mA
V
OL1
Output Low Voltage
3.0V
0.8
0.2
V
I
OL
= +4.0 mA
5.5V
0.4
0.1
V
I
OL
= +4.0 mA
V
OL2
Output Low Voltage
3.0V
1.0
0.4
V
I
OL
= 6 mA, 3 Pin Max
5.5V
1.0
0.5
V
I
OL
= +12 mA, 3 Pin Max
V
OFFSET
Comparator Input
3.0V
25
10
mV
Offset Voltage
5.5V
25
10
mV
I
IL
Input Leakage
3.0V
1.0
1.0
A
V
IN
= OV, V
CC
(Input bias current
5.5V
1.0
1.0
A
V
IN
= OV, V
CC
of comparator)
I
OL
Output Leakage
3.0V
1.0
1.0
A
V
IN
= OV, V
CC
5.5V
1.0
1.0
A
V
IN
= OV, V
CC
I
CC
Supply Current
3.0V
8.0
4.5
mA
@ 12 MHz
[2,3]
5.5V
15
9.0
mA
@ 12 MHz
[2,3]
4.5V
15
10
A
10 kHz; External RC
[2,5]
P R E L I M I N A R Y
Z86116
CP95WRL0501
6
DC ELECTRICAL CHARACTERISTICS
(Continued)
T
A
= 0
C to +70
C
Typical
Sym Parameter
V
CC
Min
Max
@ 25
C
Units
Conditions
Notes
I
CC1
Standby Current
3.0V
4.5
2.0
mA
HALT mode V
IN
= OV,
[2,3]
(HALT Mode)
V
CC
@ 12 MHz
5.5V
7.0
4.0
mA
HALT mode V
IN
= OV,
[2,3]
V
CC
@ 12 MHz
3.0V
2.0
1.0
mA
Clock Divide-by-16
[2 3]
@ 12 MHz
5.5V
4.5
2.5
mA
Clock Divide-by-16
[2,3]
@ 12 MHz
I
CC2
Standby Current
3.0V
10
1.0
A
STOP mode V
IN
= OV,
[4]
(STOP Mode)
V
CC
WDT is not Running
5.5V
10
3.0
A
STOP mode V
IN
= OV,
[4]
V
CC
WDT is not Running
3.0V
TBD
A
STOP mode V
IN
= OV,
[4]
V
CC
WDT is Running
5.5V
TBD
200
A
STOP mode V
IN
= OV,
[4]
V
CC
WDT is Running
5.5V
12
5
A
STOP Mode; TM BASE = 32.768 KHz;
[6]
WDT is not Running
T
POR
Power-On Reset
3.0V
7
24
13
ms
5.5V
3
13
7
ms
V
BO
V
CC
Low Voltage
1.50
2.65
2.1
V
2 MHz max Ext. CLK Freq.
[1]
Protection Voltage
Notes
[1]
V
LV
increases as the temperature decreases.
[2]
All outputs unloaded, I/O pins floating,
inputs at either rail, TM BASE clock input grounded.
[3]
C
L1
= C
L2
= 100 pF.
[4]
Same as note [2] except inputs at V
CC
.
[5]
Low EMI oscillator selected;
SCLK = RC/2
RC selected for WDT;
10 kHz RC Oscillator
(corresponding to R
1.2 M
, C
68 pF).
[6]
Z8 in STOP mode;
WDT off;
TM BASE selected as Z8 system clock source
Time base counter enabled;
V
CC
= 5.5V.
P R E L I M I N A R Y
Z86116
CP95WRL0501
7
Clock
1
3
4
8
2
2
3
TIN
IRQN
6
5
7
7
11
Clock
Setup
10
9
Stop-Mode
Recovery
Source
AC ELECTRICAL CHARACTERISTICS
P R E L I M I N A R Y
Z86116
CP95WRL0501
8
AC ELECTRICAL CHARACTERISTICS
(Continued)
T
A
= 0
C to +70
C
V
CC
12 MHz
No
Sym
Parameter
Note [3]
Min
Max
Units
Notes
1
TpC
Input Clock Period
3.3V
83
100,000
ns
[1]
5.0V
83
100,000
ns
[1]
2
TrC,TfC
Clock Input Rise
3.3V
15
ns
[1]
and Fall Times
5.0V
15
ns
[1]
3
TwC
Input Clock Width
3.3V
26
ns
[1]
5.0V
26
ns
[1]
4
TwTinL
Timer Input Low Width
3.3V
100
ns
[1]
5.0V
70
ns
[1]
5
TwTinH
Timer Input High Width
3.3V
3TpC
[1]
5.0V
3TpC
[1]
6
TpTin
Timer Input Period
3.3V
8TpC
[1]
5.0V
8TpC
[1]
7
TrTin,
Timer Input Rise
3.3V
100
ns
[1]
TtTin
and Fall Timer
5.0V
100
ns
[1]
8
TwIL
Int. Request Input
3.3V
100
ns
[1,2]
Low Time
5.0V
70
ns
[1,2]
9
TwIH
Int. Request Input
3.3V
3TpC
[1,2]
High Time
5.0V
3TpC
[1,2]
10
Twsm
Stop-Mode Recovery
3.3V
12
ns
Width Spec
5.0V
12
ns
11
Tost
Oscillator Startup Time
3.3V
5TpC
Reg.[4]
5.0V
5TpC
ns
Twdt
Watch-Dog Timer
3.3V
15
[5]
Refresh Time
5.0V
5
ms
D0 = 0 [6, D1 = 0 [6]
3.3V
30
ms
D0 = 1 [6]
5.0V
16
ms
D1 = 0 [6]
3.3V
60
ms
D0 = 0 [6]
5.0V
25
ms
D1 = 1 [6]
3.3V
250
ms
D0 = 1 [6]
5.0V
120
ms
D1 = 1 [6]
Notes:
[1] Timing Reference uses 0.9 V
CC
for a logic 1 and 0.1 V
CC
for a logic 0.
[2] Interrupt request through Port 3 (P33-P31).
[3] 5.0V
0.5V, 3.3V
0.3V.
[4] SMR-D5 = 0.
[5] Reg. WDTMR.
[6] WDT Oscillator only.
P R E L I M I N A R Y
Z86116
CP95WRL0501
9
1995 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of mer-
chantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
Zilog's products are not authorized for use as critical compo-
nents in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
Internet: http://www.zilog.com
Pre-Characterization Product:
The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-con-
formance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.
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