ICS548-05C ICST - T1/E1 Clock MultiplierThe ICS548-05C isA low-cost, low-jitter,high-performace clock synthesizer designed toproduce x16 and x24 clocks from T1 and E1frequencies. Using ICS’ patented analog/digital Phase-Locked Loop (PLL) techniques, the device uses acrystal or clock input to synthesize popularcommunications frequencies. Power down modes allowthe chip to turn off completely, or the PLL and clockoutput to be turned off separately.ICS manuafactures the largest variety ofcommunications clock synthesizers for al
ICS85454-01 ICST - DUAL 2:1/1:2 DIFFERENTIAL-TO-LVDS MULTIPLEXERThe ICS85454-01 isA 2:1/1:2 Multiplexer anda member of the HiPerClockSTM family of highperformance clock solutions from ICS. The 2:1Multiplexer allows one of 2 inputs to be selectedonto one output pin and the 1:2 MUXswitches one input to both of two outputs. This devicemay be useful for multiplexing multi-rate Ethernet PHYswhich have 100Mbit and 1000Mbit transmit/receivepairs onto an optical SFP module which hasA singletransmit/receive pair. Another mode allows
ICS855011 ICST - Low Skew, 1-to-2 Differential-to-2.5V/3.3V CML Fanout BufferThe ICS855011 isA low skew, high performance 1-to-2 Differential-to-2.5V/3.3V CML Fanout Buffer andA member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS855011 is characterized to operate from eitherA 2.5V orA 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS855011 ideal for those clock distribution applications demanding well defined performance and repeatability.
ICS858011 ICST - Low Skew, 1-to-2 Differential LVPECL-to-CML Fanout BufferThe ICS858011 isA high speed 1-to-2 Differential-to-CML Fanout Buffer and isA member of the HiPerClockS™ family of high performance clock solutions from ICS. The ICS858011 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and Vref_ac pin allow other differential signal families suc
ICS858020 ICST - Low Skew, 1-to-4 Differential LVPECL-to-CML Fanout BufferThe ICS858020 isA high speed 1-to-4 Differential-to-CML Fanout Buffer and isA member of the HiPerClockS™ family of high performance clock solutions from ICS. The ICS858020 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and Vref_ac pin allow other differential signal families suc
ICS8602 ICST - Zero Delay, Differential-to-lvcmos/lvttl
ICS8602BT ICST - ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL
ICS8602BY ICST - Lowskew 1-to-9 Differential-to-lvcmos Zero Delay Buffer
ICS8602BYT ICST - ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL
ICS8624 ICST - Low Skew, 1-to-5 Differential-to-hstl Zero Delay Buffer
ICS8624BY ICST - Lowskew 1-to-5 Differential-to-lvhstl Zero Delay Buffer
ICS8624BYI ICST - Lowskew 1-to-5 Differential-to-lvhstl Zero Delay Buffer. Industrialtemperature.
ICS8624BYLF ICST - LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
ICS8624BYLFT ICST - LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
ICS8624BYT ICST - LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
ICS8633-01 ICST - 1-TO-3 DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY BUFFERThe ICS8633-01 isA high performance 1-to-3Differential-to-3.3V LVPECL Zero Delay BufferandA member of the HiPerClockS™ family ofHigh Performance Clock Solutions from ICS.The ICS8633-01 has two selectable clock inputs.The CLKx, nCLKx pairs can accept most standarddifferential input levels. Utilizing one of the outputs as feedbackto the PLL, output frequencies up to 700MHz can beregenerated with zero delay with respect to the input. Dualreference clock inp
ICS8634BY ICST - Lowskew 1-to-5 Differential-to-lvpecl Zero Delay Buffer
ICS8634BY-01 ICST - Lowskew 1-to-5 Differential-to-lvpecl Zero Delay Buffer
ICS86953BYI ICST - Lowskew 1-to-9 Zero Delay Buffer. Industrial Temperature
ICS87004 ICST - 1:4, Differential-to-lvcmos/lvttl Zero Delay Clock Generator
ICS87004AG ICST - 1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR
ICS87004AGT ICST - 1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR
ICS8705 ICST - Zero Delay, Differential-to-lvcmos/lvttl Clock Generator
ICS8705BY ICST - ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS8705BYI ICST - Lowskew 1-to-8 Clock Generator. Industrial Temperature
ICS8705BYLF ICST - ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS8705BYLFT ICST - ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS8705BYT ICST - ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS87158 ICST - 1-TO-6, LVPECL-TO-HCSL/LVCMOS ч1, ч2, ч4 CLOCK GENERATORThe ICS87158 isA high performance 1-to-6LVPECL-to-HCSL/LVCMOS Clock Generatorand isA member of the HiPerClockS™ family ofHigh Performance Clock Solutions from ICS. TheICS87158 has one differential input (which canaccept LVDS, LVPECL, LVHSTL, SSTL, HCSL), six differentialHCSL output pairs and two complementary LVCMOS/LVTTLoutputs. The six HCSL output pairs can be individually configuredfor divide-by-1, 2, and 4 or high impedance by use ofselect pins.
ICS873034 ICST - Low Skew ч2, ч4, ч8 Differential-to-2.5V, 3.3V LVPECL DividerThe ICS873034 isA low skew, high performance Differential-to-2.5V, 3.3V LVPECL/ECL Clock Generator andA member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS873034 is characterized to operate from eitherA 2.5V orA 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS873034 ideal for those clock distribution applications demanding well defined performance and repeatability.
ICS8737I-11 ICST - LOW SKEW ч1/ч2 DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATORThe ICS8737I-11 isA low skew, high performanceDifferential-to-3.3V LVPECL ClockGenerator/Divider andA member of theHiPerClockS™ family of High Performance ClockSolutions from ICS. The ICS8737I-11 has twoselectable clock inputs. The CLK, nCLK pair can acceptmost standard differential input levels. The PCLK, nPCLKpair can accept LVPECL, CML, or SSTL input levels.Theclock enable is internally synchronized to eliminate runtpulses on the outputs during
ICS87974I ICST - LOW SKEW, 1-TO-15, LVCMOS/LVTTL CLOCK GENERATORThe ICS87974I isA low skew, low jitter 1-to-15LVCMOS/LVTTL Clock Generator/Zero DelayBuffer and isA member of the HiPerClockS™family of high performance clock solutions fromICS. The device hasA fully integrated PLL andthree banks whose divider ratios can be independently controlled,providing output frequency relationships of 1:1, 2:1,3:1, 3:2, 3:2:1. In addition, the external feedback connectionprovides forA wide selection of output-to-input frequencyratios
ICS889832 ICST - LOW SKEW, 1-TO-4 DIFFERENTIALTO- LVDS FANOUT BUFFERDifferentialto-LVDS Fanout Buffer and isA member of theHiPerClockS™ family of high performanceclock solutions from ICS. The ICS889832 isoptimized for high speed and very low outputskew, making it suitable for use in demanding applicationssuch as SONET, 1 Gigabit and 10 Gigabit Ethernet, andFibre Channel. The internally terminated differential inputand VREF_AC pin allow other differential signal familiessuch as LVPECL, LVDS, and SSTL to be easily interfaced
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