93LC56BXT-I/SNG - The 93LC56B isA 2K-bit Low-voltage Serial Electrically Erasable Prom Memory Organized asA Single Block of 128 X 16-bits Memory
93LC56C - Note:this Product is Not Recommended For Designs Please Consider Using:<br>product 93LC56CThe 93LC56 isA 2K-bit Low-voltage Serial Electrically Erasable Prom Memory With an Org Pin Selectable Memory Configuration of 256 X 8-bits or 128 X 16-bits
DSPIC30F - High-performance 16-bit Digital Signal Controller Family Overview
dsPIC30F1010 - High-Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• 83 base instructions with flexible addressingmodes• 24-bit wide instructions, 16-bit wide data path• 12 Kbytes on-chip Flash program space• 512 bytes on-chip data RAM• 16 x 16-bit working register array• Up to 30 MIPs operation:- Dual Internal RC 9.7 and 14.55 MHz (±1%)- 32X PLL with 480 MHz VCO- PLL inputs ±3%- External EC clock 9.7 and 14.55 MHz- HS Crystal mode 9.7 and 14.55 MHz• 32 inte
DSPIC30F2011 - High-performance Digital Signal Controllers
DSPIC30F2012 - High-Performance Digital Signal Controllers
dsPIC30F2020 - High-Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• 83 base instructions with flexible addressingmodes• 24-bit wide instructions, 16-bit wide data path• 12 Kbytes on-chip Flash program space• 512 bytes on-chip data RAM• 16 x 16-bit working register array• Up to 30 MIPs operation:- Dual Internal RC 9.7 and 14.55 MHz (±1%)- 32X PLL with 480 MHz VCO- PLL inputs ±3%- External EC clock 9.7 and 14.55 MHz- HS Crystal mode 9.7 and 14.55 MHz • 32
dsPIC30F2023 - High-Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• 83 base instructions with flexible addressingmodes• 24-bit wide instructions, 16-bit wide data path• 12 Kbytes on-chip Flash program space• 512 bytes on-chip data RAM• 16 x 16-bit working register array• Up to 30 MIPs operation:- Dual Internal RC 9.7 and 14.55 MHz (±1%)- 32X PLL with 480 MHz VCO- PLL inputs ±3%- External EC clock 9.7 and 14.55 MHz- HS Crystal mode 9.7 and 14.55 MHz • 32
DSPIC30F3012 - High-Performance Digital Signal Controllers
DSPIC30F3013 - High-Performance Digital Signal Controllers
dsPIC30F3014 - Digital Signal ControllersHigh Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• Flexible addressing modes• 84 base instructions• 24-bit wide instructions, 16-bit wide data path• Up to 48 Kbytes on-chip Flash program space• 2 Kbytes of on-chip data RAM• 1 Kbyte of non-volatile data EEPROM• 16 x 16-bit working register array• Up to 30 MIPs operation:- DC to 40 MHz external clock input- 4 MHz-10 MHz oscillator input withPLL active (4x, 8x, 16x)•
dsPIC30F4013 - Digital Signal ControllersHigh Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• Flexible addressing modes• 84 base instructions• 24-bit wide instructions, 16-bit wide data path• Up to 48 Kbytes on-chip Flash program space• 2 Kbytes of on-chip data RAM• 1 Kbyte of non-volatile data EEPROM• 16 x 16-bit working register array• Up to 30 MIPs operation:- DC to 40 MHz external clock input- 4 MHz-10 MHz oscillator input withPLL active (4x, 8x, 16x)•
dsPIC30F4013-30I/ML - Digital Signal ControllersHigh Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• Flexible addressing modes• 84 base instructions• 24-bit wide instructions, 16-bit wide data path• Up to 48 Kbytes on-chip Flash program space• 2 Kbytes of on-chip data RAM• 1 Kbyte of non-volatile data EEPROM• 16 x 16-bit working register array• Up to 30 MIPs operation:- DC to 40 MHz external clock input- 4 MHz-10 MHz oscillator input withPLL active (4x, 8x, 16x)•
dsPIC30F4013-30I/P - Digital Signal ControllersHigh Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• Flexible addressing modes• 84 base instructions• 24-bit wide instructions, 16-bit wide data path• Up to 48 Kbytes on-chip Flash program space• 2 Kbytes of on-chip data RAM• 1 Kbyte of non-volatile data EEPROM• 16 x 16-bit working register array• Up to 30 MIPs operation:- DC to 40 MHz external clock input- 4 MHz-10 MHz oscillator input withPLL active (4x, 8x, 16x)•
dsPIC30F4013-30I/PT - Digital Signal ControllersHigh Performance Modified RISC CPU:• Modified Harvard architecture• C compiler optimized instruction set architecture• Flexible addressing modes• 84 base instructions• 24-bit wide instructions, 16-bit wide data path• Up to 48 Kbytes on-chip Flash program space• 2 Kbytes of on-chip data RAM• 1 Kbyte of non-volatile data EEPROM• 16 x 16-bit working register array• Up to 30 MIPs operation:- DC to 40 MHz external clock input- 4 MHz-10 MHz oscillator input withPLL active (4x, 8x, 16x)•
dsPIC30F5011 - High-performance Digital Signal Controllersthe DsPIC30F5011/5013 Devices Containextensive Digital Signal Processor (DSP) FunctionalitywithinA High Performance 16-bit Microcontroller (MCU)architecture. Figure 1-1 and Figure 1-2 Show Deviceblock Diagrams For DsPIC30F5011 and DsPIC30F5013respectively.
DSPIC30F6011 - High Performance Digital Signal Controllers
DSPIC30F6012 - High Performance Digital Signal Controllers
DSPIC30F6013 - High Performance Digital Signal Controllers
DSPIC30F6014 - High Performance Digital Signal Controllers
DSPIC30Fxxxx - High-Performance 16-bit Digital Signal Controller Family Overview
DSPIC30Fxxxx - High Performance Digital Signal Controllers
ENC28J60 - Stand-alone Ethernet Controller With Spi Product Brief
ER5911 - 1k (128 X 8 Or 64 X 16) Serial Electrically Erasable Prom
ER5911-IJ - 1K (128 X 8 OR 64 X 16) SERIAL ELECTRICALLY ERASABLE PROM
ER5911-IP - 1K (128 X 8 OR 64 X 16) SERIAL ELECTRICALLY ERASABLE PROM
ER5911-J - 1K (128 X 8 OR 64 X 16) SERIAL ELECTRICALLY ERASABLE PROM
ER5911-P - 1K (128 X 8 OR 64 X 16) SERIAL ELECTRICALLY ERASABLE PROM
GMCP2122 - Infrared Encoder/DecoderThe MCP2122 isA stand-alone IrDA standard encoder/decoder device that is pinout-compatible with theAgilent® HSDL-7000 encoder/decoder.The MCP2122 has two interfaces: the host UARTinterface and the IR interface (see Figure 1-1). The hostUART interfaces to the UART of the Host Controller.The Host Controller is the device in the embeddedsystem that transmits and receives the data. The IRinterface connects to an infrared (IR) optical transceivercircuit that converts electrical pulses in
GS001 - Getting Started With Bldc Motors and Dspic30f Devices
HCS101 - The HCS101 isA Fixed Code Encoder Designed For Remote Control Systems
Ctrl